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dcf30fc0ca
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200708165856.15322-1-grandmaster@al2klimov.de
30 lines
975 B
Plaintext
30 lines
975 B
Plaintext
* Device tree bindings for Texas instruments Keystone timer
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This document provides bindings for the 64-bit timer in the KeyStone
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architecture devices. The timer can be configured as a general-purpose 64-bit
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timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
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timers, each half can operate in conjunction (chain mode) or independently
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(unchained mode) of each other.
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It is global timer is a free running up-counter and can generate interrupt
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when the counter reaches preset counter values.
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Documentation:
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https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf
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Required properties:
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- compatible : should be "ti,keystone-timer".
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- reg : specifies base physical address and count of the registers.
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- interrupts : interrupt generated by the timer.
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- clocks : the clock feeding the timer clock.
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Example:
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timer@22f0000 {
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compatible = "ti,keystone-timer";
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reg = <0x022f0000 0x80>;
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interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clktimer15>;
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};
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