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0e8f68d7f0
With the powercap dtpm controller, we are able to plug devices with
power limitation features in the tree.
The following patch introduces the CPU power limitation based on the
energy model and the performance states.
The power limitation is done at the performance domain level. If some
CPUs are unplugged, the corresponding power will be subtracted from
the performance domain total power.
It is up to the platform to initialize the dtpm tree and add the CPU.
Here is an example to create a simple tree with one root node called
"pkg" and the CPU's performance domains.
static int dtpm_register_pkg(struct dtpm_descr *descr)
{
struct dtpm *pkg;
int ret;
pkg = dtpm_alloc(NULL);
if (!pkg)
return -ENOMEM;
ret = dtpm_register(descr->name, pkg, descr->parent);
if (ret)
return ret;
return dtpm_register_cpu(pkg);
}
static struct dtpm_descr descr = {
.name = "pkg",
.init = dtpm_register_pkg,
};
DTPM_DECLARE(descr);
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Lukasz Luba <lukasz.luba@arm.com>
Tested-by: Lukasz Luba <lukasz.luba@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
60 lines
1.9 KiB
Plaintext
60 lines
1.9 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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#
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# Generic power capping sysfs interface configuration
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#
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menuconfig POWERCAP
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bool "Generic powercap sysfs driver"
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help
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The power capping sysfs interface allows kernel subsystems to expose power
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capping settings to user space in a consistent way. Usually, it consists
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of multiple control types that determine which settings may be exposed and
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power zones representing parts of the system that can be subject to power
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capping.
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If you want this code to be compiled in, say Y here.
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if POWERCAP
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# Client driver configurations go here.
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config INTEL_RAPL_CORE
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tristate
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config INTEL_RAPL
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tristate "Intel RAPL Support via MSR Interface"
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depends on X86 && IOSF_MBI
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select INTEL_RAPL_CORE
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help
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This enables support for the Intel Running Average Power Limit (RAPL)
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technology via MSR interface, which allows power limits to be enforced
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and monitored on modern Intel processors (Sandy Bridge and later).
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In RAPL, the platform level settings are divided into domains for
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fine grained control. These domains include processor package, DRAM
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controller, CPU core (Power Plane 0), graphics uncore (Power Plane
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1), etc.
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config IDLE_INJECT
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bool "Idle injection framework"
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depends on CPU_IDLE
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default n
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help
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This enables support for the idle injection framework. It
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provides a way to force idle periods on a set of specified
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CPUs for power capping. Idle period can be injected
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synchronously on a set of specified CPUs or alternatively
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on a per CPU basis.
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config DTPM
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bool "Power capping for Dynamic Thermal Power Management"
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help
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This enables support for the power capping for the dynamic
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thermal power management userspace engine.
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config DTPM_CPU
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bool "Add CPU power capping based on the energy model"
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depends on DTPM && ENERGY_MODEL
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help
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This enables support for CPU power limitation based on
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energy model.
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endif
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