linux/arch/riscv/net
Pu Lehui 25ad10658d riscv, bpf: Adapt bpf trampoline to optimized riscv ftrace framework
Commit 6724a76cff ("riscv: ftrace: Reduce the detour code size to
half") optimizes the detour code size of kernel functions to half with
T0 register and the upcoming DYNAMIC_FTRACE_WITH_DIRECT_CALLS of riscv
is based on this optimization, we need to adapt riscv bpf trampoline
based on this. One thing to do is to reduce detour code size of bpf
programs, and the second is to deal with the return address after the
execution of bpf trampoline. Meanwhile, we need to construct the frame
of parent function, otherwise we will miss one layer when unwinding.
The related tests have passed.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
Tested-by: Björn Töpel <bjorn@rivosinc.com>
Link: https://lore.kernel.org/r/20230721100627.2630326-1-pulehui@huaweicloud.com
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2023-08-02 14:03:56 -07:00
..
bpf_jit_comp32.c bpf: Change value of MAX_TAIL_CALL_CNT from 32 to 33 2021-11-16 14:03:15 +01:00
bpf_jit_comp64.c riscv, bpf: Adapt bpf trampoline to optimized riscv ftrace framework 2023-08-02 14:03:56 -07:00
bpf_jit_core.c riscv, bpf: Fix inconsistent JIT image generation 2023-07-11 09:09:40 +02:00
bpf_jit.h riscv, bpf: Fix inconsistent JIT image generation 2023-07-11 09:09:40 +02:00
Makefile riscv, bpf: Add RV32G eBPF JIT 2020-03-05 16:13:47 +01:00