Dan Williams 256d0e9ee4 cxl/port: Move 'cxl_ep' references to an xarray per port ... In preparation for region provisioning that needs to walk the topology by endpoints, use an xarray to record endpoint interest in a given port. In addition to being more space and time efficient it also reduces the complexity of the implementation by moving locking internal to the xarray implementation. It also allows for a single cxl_ep reference to be recorded in multiple xarrays. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20220624041950.559155-2-dan.j.williams@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>		2022-07-21 17:19:24 -07:00
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core	cxl/port: Move 'cxl_ep' references to an xarray per port	2022-07-21 17:19:24 -07:00
acpi.c	cxl/port: Record parent dport when adding ports	2022-07-21 17:19:24 -07:00
cxl.h	cxl/port: Move 'cxl_ep' references to an xarray per port	2022-07-21 17:19:24 -07:00
cxlmem.h	cxl/hdm: Enumerate allocated DPA	2022-07-21 17:19:12 -07:00
cxlpci.h	cxl/port: Read CDAT table	2022-07-19 15:38:05 -07:00
Kconfig	cxl/pci: Create PCI DOE mailbox's for memory devices	2022-07-19 15:38:04 -07:00
Makefile	PM: CXL: Disable suspend	2022-04-22 16:09:42 -07:00
mem.c	cxl/port: Record parent dport when adding ports	2022-07-21 17:19:24 -07:00
pci.c	cxl/pci: Create PCI DOE mailbox's for memory devices	2022-07-19 15:38:04 -07:00
pmem.c	cxl/mbox: Use __le32 in get,set_lsa mailbox structures	2022-06-21 14:09:00 -07:00
port.c	cxl/port: Read CDAT table	2022-07-19 15:38:05 -07:00