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0048a17348
Add functions for configuration of the parallel camera bus pins on S5PV210 and Exynos4 SoC. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
45 lines
1.0 KiB
C
45 lines
1.0 KiB
C
/*
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* Copyright (C) 2011 Samsung Electronics Co., Ltd.
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*
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* Exynos4 camera interface GPIO configuration.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <plat/gpio-cfg.h>
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#include <plat/camport.h>
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int exynos4_fimc_setup_gpio(enum s5p_camport_id id)
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{
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u32 gpio8, gpio5;
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u32 sfn;
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int ret;
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switch (id) {
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case S5P_CAMPORT_A:
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gpio8 = EXYNOS4_GPJ0(0); /* PCLK, VSYNC, HREF, DATA[0:4] */
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gpio5 = EXYNOS4_GPJ1(0); /* DATA[5:7], CLKOUT, FIELD */
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sfn = S3C_GPIO_SFN(2);
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break;
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case S5P_CAMPORT_B:
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gpio8 = EXYNOS4_GPE0(0); /* DATA[0:7] */
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gpio5 = EXYNOS4_GPE1(0); /* PCLK, VSYNC, HREF, CLKOUT, FIELD */
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sfn = S3C_GPIO_SFN(3);
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break;
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default:
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WARN(1, "Wrong camport id: %d\n", id);
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return -EINVAL;
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}
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ret = s3c_gpio_cfgall_range(gpio8, 8, sfn, S3C_GPIO_PULL_UP);
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if (ret)
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return ret;
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return s3c_gpio_cfgall_range(gpio5, 5, sfn, S3C_GPIO_PULL_UP);
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}
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