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This replaces an earlier patch from Viresh Kumar to move the spear platform over to the generic DMA binding. This version is now based on the merged multiplatform capable spear platform, rather than the separate spear13xx/3xx/6xx directories. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Vinod Koul <vinod.koul@linux.intel.com> Cc: devicetree-discuss@lists.ozlabs.org Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: spear-devel@list.st.com
94 lines
3.2 KiB
C
94 lines
3.2 KiB
C
/*
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* SPEAr3xx/6xx Machine family specific definition
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*
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* Copyright (C) 2009,2012 ST Microelectronics
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* Rajeev Kumar<rajeev-dlh.kumar@st.com>
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* Viresh Kumar <viresh.linux@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __MACH_SPEAR_H
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#define __MACH_SPEAR_H
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#include <asm/memory.h>
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#if defined(CONFIG_ARCH_SPEAR3XX) || defined (CONFIG_ARCH_SPEAR6XX)
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/* ICM1 - Low speed connection */
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#define SPEAR_ICM1_2_BASE UL(0xD0000000)
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#define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000)
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#define SPEAR_ICM1_UART_BASE UL(0xD0000000)
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#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE - SPEAR_ICM1_2_BASE + SPEAR_ICM1_UART_BASE)
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#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
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/* ML-1, 2 - Multi Layer CPU Subsystem */
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#define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000)
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#define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000)
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/* ICM3 - Basic Subsystem */
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#define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
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#define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000)
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#define SPEAR_ICM3_DMA_BASE UL(0xFC400000)
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#define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
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#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_SYS_CTRL_BASE)
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#define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000)
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#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_MISC_REG_BASE)
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/* Debug uart for linux, will be used for debug and uncompress messages */
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#define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE
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#define VA_SPEAR_DBG_UART_BASE VA_SPEAR_ICM1_UART_BASE
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/* Sysctl base for spear platform */
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#define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE
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#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE
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#endif /* SPEAR3xx || SPEAR6XX */
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/* SPEAr320 Macros */
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#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000)
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#define VA_SPEAR320_SOC_CONFIG_BASE IOMEM(0xFE000000)
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#ifdef CONFIG_ARCH_SPEAR13XX
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#define PERIP_GRP2_BASE UL(0xB3000000)
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#define VA_PERIP_GRP2_BASE IOMEM(0xFE000000)
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#define MCIF_SDHCI_BASE UL(0xB3000000)
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#define SYSRAM0_BASE UL(0xB3800000)
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#define VA_SYSRAM0_BASE IOMEM(0xFE800000)
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#define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600)
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#define PERIP_GRP1_BASE UL(0xE0000000)
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#define VA_PERIP_GRP1_BASE IOMEM(0xFD000000)
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#define UART_BASE UL(0xE0000000)
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#define VA_UART_BASE IOMEM(0xFD000000)
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#define SSP_BASE UL(0xE0100000)
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#define MISC_BASE UL(0xE0700000)
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#define VA_MISC_BASE IOMEM(0xFD700000)
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#define A9SM_AND_MPMC_BASE UL(0xEC000000)
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#define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000)
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#define SPEAR1310_RAS_BASE UL(0xD8400000)
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#define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000))
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/* A9SM peripheral offsets */
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#define A9SM_PERIP_BASE UL(0xEC800000)
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#define VA_A9SM_PERIP_BASE IOMEM(0xFC800000)
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#define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00)
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#define L2CC_BASE UL(0xED000000)
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#define VA_L2CC_BASE IOMEM(UL(0xFB000000))
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/* others */
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#define MCIF_CF_BASE UL(0xB2800000)
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/* Debug uart for linux, will be used for debug and uncompress messages */
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#define SPEAR_DBG_UART_BASE UART_BASE
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#define VA_SPEAR_DBG_UART_BASE VA_UART_BASE
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#endif /* SPEAR13XX */
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#endif /* __MACH_SPEAR_H */
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