Paul Cercueil 249592bf6d clk: Support bypassing dividers ... When a clock is declared as both CGU_CLK_DIV and CGU_CLK_MUX, the CGU code expects the mux to be applied first, the divider second. On the JZ4760, and maybe on some other SoCs, some clocks also have a mux setting and a divider, but the divider is not applied to all parents selectable from the mux. This could be solved by creating two clocks, one with CGU_CLK_DIV and one with CGU_CLK_MUX, but that would increase the number of clocks. Instead, add a 8-bit mask to CGU_CLK_DIV clocks. If the bit corresponding to the parent clock's index is set, the divider is bypassed. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20210530164923.18134-3-paul@crapouillou.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2021-06-27 19:49:17 -07:00
..
actions	clk: actions: Add Actions S500 SoC Reset Management Unit support	2020-07-21 01:50:47 -07:00
analogbits
at91	clk: at91: Trivial typo fixes in the file sama7g5.c	2021-03-13 13:02:02 -08:00
axis
axs10x
baikal-t1	clk: baikal-t1: Mark Ethernet PLL as critical	2020-10-13 19:48:34 -07:00
bcm	clk: bcm: rpi: Release firmware handle on unbind	2021-03-22 17:59:51 +01:00
berlin
davinci	This pull request contains zero diff to the core framework. It is a collection	2020-10-22 12:53:28 -07:00
h8300
hisilicon
imgtec	treewide: replace '---help---' in Kconfig files with 'help'	2020-06-14 01:57:21 +09:00
imx	clk: imx: Reference preceded by free	2021-04-04 22:39:05 +03:00
ingenic	clk: Support bypassing dividers	2021-06-27 19:49:17 -07:00
keystone	treewide: Change list_sort to use const pointers	2021-04-08 16:04:22 -07:00
loongson1
mediatek	clk: mediatek: mux: Update parent at enable time	2021-02-09 00:01:28 -08:00
meson	clk: meson: axg: Remove MIPI enable clock gate	2021-02-09 13:32:59 +01:00
microchip
mmp	clk: mmp2: fix build without CONFIG_PM	2021-01-12 12:10:55 -08:00
mstar	clk: mstar: msc313-mpll: Fix format specifier	2021-02-16 12:52:28 -08:00
mvebu	clk: mvebu: armada-37xx-periph: Fix workaround for switching from L1 to L0	2021-04-09 15:17:33 +05:30
mxs
nxp
pistachio
pxa	clk: pxa: Constify static struct clk_ops	2020-10-13 19:49:11 -07:00
qcom	clk: qcom: rpmh: add support for SDX55 rpmh IPA clock	2021-04-12 17:55:22 -07:00
ralink	clk: ralink: add clock driver for mt7621 SoC	2021-04-12 19:10:54 -07:00
renesas	clk: renesas: Zero init clk_init_data	2021-03-30 09:58:27 +02:00
rockchip	clk: rockchip: drop MODULE_ALIAS from rk3399 clock controller	2021-03-21 11:13:30 +01:00
samsung	clk: samsung: Remove redundant dev_err calls	2021-04-08 19:35:26 +02:00
sifive	clk: sifive: Use reset-simple in prci driver for PCIe driver	2021-05-04 12:26:09 +01:00
socfpga	Here's a collection of largely clk driver updates for the merge window. The	2021-04-28 17:13:56 -07:00
spear	clk: spear: Move prototype to accessible header	2021-02-11 11:56:06 -08:00
sprd	This time around we have 4 lines of diff in the core framework, removing a	2020-06-10 11:42:19 -07:00
st	clk: st: clkgen-fsyn: Fix worthy struct documentation demote partially filled one	2021-02-11 11:56:06 -08:00
sunxi	clk: sunxi: Demote non-conformant kernel-doc headers	2021-03-08 16:47:55 +01:00
sunxi-ng	clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll	2021-03-06 15:41:00 +08:00
tegra	clk: tegra: Don't enable PLLE HW sequencer at init	2021-03-24 14:02:14 +01:00
ti	clk: ti: omap5: Add missing gpmc and ocmc clkctrl	2021-03-10 13:59:18 +02:00
uniphier	clk: uniphier: Fix potential infinite loop	2021-04-12 19:09:59 -07:00
ux500
versatile	clk: versatile: clk-icst: Fix worthy struct documentation block	2021-02-11 11:56:07 -08:00
x86	More ACPI updates for 5.9-rc1	2020-08-15 08:18:22 -07:00
xilinx	clk: xilinx: move xlnx_vcu clock driver from soc	2021-02-08 18:31:25 -08:00
zynq	clk: zynq: clkc: Remove various instances of an unused variable 'clk'	2021-02-11 11:56:07 -08:00
zynqmp	clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable	2021-04-07 18:09:35 -07:00
clk-asm9260.c	clk: asm9260: fix __clk_hw_register_fixed_rate_with_accuracy typo	2020-04-13 12:20:06 -07:00
clk-aspeed.c
clk-aspeed.h
clk-ast2600.c	media: aspeed: fix clock handling logic	2021-03-11 11:59:45 +01:00
clk-axi-clkgen.c	clk: axi-clkgen: use devm_platform_ioremap_resource() short-hand	2021-02-08 18:13:13 -08:00
clk-axm5516.c
clk-bd718x7.c	clk: bd718x7: Add support for clk gate on ROHM BD71815 PMIC	2021-04-14 10:21:26 +01:00
clk-bm1880.c
clk-bulk.c
clk-cdce706.c	Replace HTTP links with HTTPS ones: Common CLK framework	2020-07-10 17:15:34 -07:00
clk-cdce925.c
clk-clps711x.c
clk-composite.c	clk: composite: add devm_clk_hw_register_composite_pdata()	2020-12-07 14:06:16 -08:00
clk-conf.c
clk-cs2000-cp.c
clk-devres.c
clk-divider.c	clk: divider: fix initialization with parent_hw	2021-02-08 18:31:24 -08:00
clk-fixed-factor.c	clk: fixed: fix double free in resource managed fixed-factor clock	2021-04-07 16:01:25 -07:00
clk-fixed-mmio.c	clk: clk-fixed-mmio: Demote obvious kernel-doc abuse	2021-02-11 11:56:05 -08:00
clk-fixed-rate.c	clk: fixed: add missing kerneldoc	2020-09-22 12:44:14 -07:00
clk-fractional-divider.c
clk-fsl-flexspi.c	clk: fsl-flexspi: new driver	2020-12-07 16:56:41 -08:00
clk-fsl-sai.c	clk: fsl-sai: use devm_clk_hw_register_composite_pdata()	2020-12-07 14:06:16 -08:00
clk-gate.c	treewide: Remove uninitialized_var() usage	2020-07-16 12:35:15 -07:00
clk-gemini.c
clk-gpio.c	Replace HTTP links with HTTPS ones: Common CLK framework	2020-07-10 17:15:34 -07:00
clk-hi655x.c
clk-highbank.c
clk-hsdk-pll.c	CLK: HSDK: CGU: add support for 148.5MHz clock	2020-05-28 21:06:39 -07:00
clk-k210.c	clk: Add RISC-V Canaan Kendryte K210 clock driver	2021-02-22 17:51:04 -08:00
clk-lochnagar.c
clk-max9485.c
clk-max77686.c
clk-milbeaut.c
clk-moxart.c
clk-multiplier.c
clk-mux.c	clk: mux: provide devm_clk_hw_register_mux()	2021-04-07 11:05:44 -07:00
clk-nomadik.c
clk-npcm7xx.c	clk: clk-npcm7xx: Remove unused static const tables 'npcm7xx_gates' and 'npcm7xx_divs_fx'	2021-02-11 11:56:05 -08:00
clk-nspire.c
clk-oxnas.c
clk-palmas.c
clk-plldig.c
clk-pwm.c	clk: pwm: drop of_match_ptr from of_device_id table	2020-12-10 12:24:18 -08:00
clk-qoriq.c	clk: qoriq: use macros to generate pll_mask	2021-02-14 13:02:01 -08:00
clk-rk808.c
clk-s2mps11.c	clk: s2mps11: Fix a resource leak in error handling paths in the probe function	2020-12-19 15:53:31 -08:00
clk-scmi.c	clk: scmi: Port driver to the new scmi_clk_proto_ops interface	2021-03-30 16:34:37 +01:00
clk-scpi.c	clk: scpi: mark scpi_clk_match as maybe unused	2020-12-10 12:24:40 -08:00
clk-si514.c
clk-si544.c
clk-si570.c	clk: si570: Skip NVM to RAM recall operation if an optional property is set	2021-02-11 12:13:50 -08:00
clk-si5341.c	clk: si5341: drop unused 'err' variable	2020-09-22 12:44:41 -07:00
clk-si5351.c	clk: si5351: Wait for bit clear after PLL reset	2020-12-19 15:49:54 -08:00
clk-si5351.h
clk-sparx5.c	clk: sparx5: Add Sparx5 SoC DPLL clock driver	2020-07-28 18:17:56 -07:00
clk-stm32f4.c
clk-stm32h7.c
clk-stm32mp1.c
clk-twl6040.c
clk-versaclock5.c	clk: vc5: Add support for optional load capacitance	2021-02-11 12:09:34 -08:00
clk-vt8500.c
clk-wm831x.c
clk-xgene.c	clk: clk-xgene: Add description for 'mask' and fix formatting for 'flags'	2021-02-11 11:56:06 -08:00
clk.c	Here's a collection of largely clk driver updates for the merge window. The	2021-04-28 17:13:56 -07:00
clk.h
clkdev.c
Kconfig	Here's a collection of largely clk driver updates for the merge window. The	2021-04-28 17:13:56 -07:00
Makefile	Here's a collection of largely clk driver updates for the merge window. The	2021-04-28 17:13:56 -07:00