Caesar Wang 2458c37779 ASoC: rockchip: i2s: change bclk and lrck according to sample rates ... This patch sets the dividers autonomously. when i2s works on master mode, and sample rates changed. We need to change bclk and lrck at the same time for cpu internal side. As the input source clock to the module is MCLK_I2S, and by the divider of the module, the clock generator generates SCLK and LRCK to transmitter and receiver. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>		2015-11-16 10:10:24 +00:00
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Kconfig	ASoC: rockchip: Add rockchip SPDIF transceiver driver	2015-10-08 16:12:01 +01:00
Makefile	ASoC: rockchip: Add rockchip SPDIF transceiver driver	2015-10-08 16:12:01 +01:00
rockchip_i2s.c	ASoC: rockchip: i2s: change bclk and lrck according to sample rates	2015-11-16 10:10:24 +00:00
rockchip_i2s.h	ASoC: rockchip: i2s: share tx/rx lrck when symmetric_rates enabled	2015-10-23 01:51:00 +09:00
rockchip_max98090.c	Merge remote-tracking branches 'asoc/topic/rcar', 'asoc/topic/reg-default', 'asoc/topic/rl6231', 'asoc/topic/rockchip' and 'asoc/topic/rt286' into asoc-next	2015-08-30 15:55:54 +01:00
rockchip_rt5645.c	Merge remote-tracking branches 'asoc/topic/rcar', 'asoc/topic/reg-default', 'asoc/topic/rl6231', 'asoc/topic/rockchip' and 'asoc/topic/rt286' into asoc-next	2015-08-30 15:55:54 +01:00
rockchip_spdif.c	ASoC: rockchip: spdif: Convert to use devm_snd_dmaengine_pcm_register	2015-10-19 20:15:16 +01:00
rockchip_spdif.h	ASoC: rockchip: Add rockchip SPDIF transceiver driver	2015-10-08 16:12:01 +01:00