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24586d8342
Add pitch length info of graphics/video layer, pitch is used to represent line length in byte, the usage depends on pix_fmt. If the fmt is YUV, the pitch[0] will be Y length,pitch[1] will be U length, pitch[2] will be V lenth. If the fmt is RGB, the picth[0] will be line lenth, and pitch[1]/pitch[2] will be 0 and not be used. Signed-off-by: Jing Xiang <jxiang@marvell.com> Signed-off-by: Jett.Zhou <jtzhou@marvell.com> Signed-off-by: Zhou Zhu <zzhu3@marvell.com> Reviewed-by: Daniel Drake <dsd@laptop.org> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
359 lines
7.6 KiB
C
359 lines
7.6 KiB
C
/*
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* linux/include/video/mmp_disp.h
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* Header file for Marvell MMP Display Controller
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*
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* Copyright (C) 2012 Marvell Technology Group Ltd.
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* Authors: Zhou Zhu <zzhu3@marvell.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#ifndef _MMP_DISP_H_
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#define _MMP_DISP_H_
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#include <linux/kthread.h>
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enum {
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PIXFMT_UYVY = 0,
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PIXFMT_VYUY,
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PIXFMT_YUYV,
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PIXFMT_YUV422P,
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PIXFMT_YVU422P,
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PIXFMT_YUV420P,
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PIXFMT_YVU420P,
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PIXFMT_RGB565 = 0x100,
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PIXFMT_BGR565,
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PIXFMT_RGB1555,
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PIXFMT_BGR1555,
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PIXFMT_RGB888PACK,
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PIXFMT_BGR888PACK,
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PIXFMT_RGB888UNPACK,
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PIXFMT_BGR888UNPACK,
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PIXFMT_RGBA888,
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PIXFMT_BGRA888,
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PIXFMT_RGB666, /* for output usage */
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PIXFMT_PSEUDOCOLOR = 0x200,
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};
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static inline int pixfmt_to_stride(int pix_fmt)
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{
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switch (pix_fmt) {
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case PIXFMT_RGB565:
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case PIXFMT_BGR565:
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case PIXFMT_RGB1555:
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case PIXFMT_BGR1555:
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case PIXFMT_UYVY:
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case PIXFMT_VYUY:
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case PIXFMT_YUYV:
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return 2;
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case PIXFMT_RGB888UNPACK:
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case PIXFMT_BGR888UNPACK:
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case PIXFMT_RGBA888:
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case PIXFMT_BGRA888:
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return 4;
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case PIXFMT_RGB888PACK:
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case PIXFMT_BGR888PACK:
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return 3;
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case PIXFMT_YUV422P:
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case PIXFMT_YVU422P:
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case PIXFMT_YUV420P:
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case PIXFMT_YVU420P:
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case PIXFMT_PSEUDOCOLOR:
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return 1;
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default:
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return 0;
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}
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}
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/* parameters used by path/overlay */
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/* overlay related para: win/addr */
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struct mmp_win {
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/* position/size of window */
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u16 xsrc;
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u16 ysrc;
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u16 xdst;
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u16 ydst;
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u16 xpos;
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u16 ypos;
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u16 left_crop;
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u16 right_crop;
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u16 up_crop;
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u16 bottom_crop;
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int pix_fmt;
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/*
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* pitch[0]: graphics/video layer line length or y pitch
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* pitch[1]/pitch[2]: video u/v pitch if non-zero
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*/
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u32 pitch[3];
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};
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struct mmp_addr {
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/* phys address */
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u32 phys[6];
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};
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/* path related para: mode */
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struct mmp_mode {
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const char *name;
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u32 refresh;
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u32 xres;
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u32 yres;
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u32 left_margin;
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u32 right_margin;
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u32 upper_margin;
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u32 lower_margin;
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u32 hsync_len;
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u32 vsync_len;
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u32 hsync_invert;
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u32 vsync_invert;
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u32 invert_pixclock;
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u32 pixclock_freq;
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int pix_fmt_out;
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};
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/* main structures */
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struct mmp_path;
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struct mmp_overlay;
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struct mmp_panel;
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/* status types */
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enum {
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MMP_OFF = 0,
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MMP_ON,
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};
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static inline const char *stat_name(int stat)
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{
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switch (stat) {
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case MMP_OFF:
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return "OFF";
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case MMP_ON:
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return "ON";
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default:
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return "UNKNOWNSTAT";
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}
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}
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struct mmp_overlay_ops {
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/* should be provided by driver */
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void (*set_fetch)(struct mmp_overlay *overlay, int fetch_id);
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void (*set_onoff)(struct mmp_overlay *overlay, int status);
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void (*set_win)(struct mmp_overlay *overlay, struct mmp_win *win);
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int (*set_addr)(struct mmp_overlay *overlay, struct mmp_addr *addr);
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};
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/* overlay describes a z-order indexed slot in each path. */
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struct mmp_overlay {
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int id;
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const char *name;
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struct mmp_path *path;
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/* overlay info: private data */
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int dmafetch_id;
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struct mmp_addr addr;
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struct mmp_win win;
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/* state */
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int open_count;
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int status;
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struct mutex access_ok;
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struct mmp_overlay_ops *ops;
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};
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/* panel type */
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enum {
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PANELTYPE_ACTIVE = 0,
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PANELTYPE_SMART,
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PANELTYPE_TV,
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PANELTYPE_DSI_CMD,
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PANELTYPE_DSI_VIDEO,
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};
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struct mmp_panel {
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/* use node to register to list */
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struct list_head node;
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const char *name;
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/* path name used to connect to proper path configed */
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const char *plat_path_name;
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struct device *dev;
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int panel_type;
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void *plat_data;
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int (*get_modelist)(struct mmp_panel *panel,
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struct mmp_mode **modelist);
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void (*set_mode)(struct mmp_panel *panel,
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struct mmp_mode *mode);
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void (*set_onoff)(struct mmp_panel *panel,
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int status);
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};
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struct mmp_path_ops {
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int (*check_status)(struct mmp_path *path);
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struct mmp_overlay *(*get_overlay)(struct mmp_path *path,
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int overlay_id);
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int (*get_modelist)(struct mmp_path *path,
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struct mmp_mode **modelist);
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/* follow ops should be provided by driver */
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void (*set_mode)(struct mmp_path *path, struct mmp_mode *mode);
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void (*set_onoff)(struct mmp_path *path, int status);
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/* todo: add query */
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};
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/* path output types */
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enum {
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PATH_OUT_PARALLEL,
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PATH_OUT_DSI,
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PATH_OUT_HDMI,
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};
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/* path is main part of mmp-disp */
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struct mmp_path {
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/* use node to register to list */
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struct list_head node;
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/* init data */
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struct device *dev;
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int id;
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const char *name;
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int output_type;
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struct mmp_panel *panel;
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void *plat_data;
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/* dynamic use */
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struct mmp_mode mode;
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/* state */
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int open_count;
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int status;
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struct mutex access_ok;
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struct mmp_path_ops ops;
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/* layers */
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int overlay_num;
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struct mmp_overlay overlays[0];
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};
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extern struct mmp_path *mmp_get_path(const char *name);
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static inline void mmp_path_set_mode(struct mmp_path *path,
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struct mmp_mode *mode)
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{
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if (path)
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path->ops.set_mode(path, mode);
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}
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static inline void mmp_path_set_onoff(struct mmp_path *path, int status)
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{
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if (path)
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path->ops.set_onoff(path, status);
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}
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static inline int mmp_path_get_modelist(struct mmp_path *path,
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struct mmp_mode **modelist)
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{
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if (path)
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return path->ops.get_modelist(path, modelist);
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return 0;
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}
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static inline struct mmp_overlay *mmp_path_get_overlay(
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struct mmp_path *path, int overlay_id)
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{
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if (path)
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return path->ops.get_overlay(path, overlay_id);
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return NULL;
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}
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static inline void mmp_overlay_set_fetch(struct mmp_overlay *overlay,
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int fetch_id)
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{
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if (overlay)
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overlay->ops->set_fetch(overlay, fetch_id);
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}
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static inline void mmp_overlay_set_onoff(struct mmp_overlay *overlay,
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int status)
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{
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if (overlay)
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overlay->ops->set_onoff(overlay, status);
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}
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static inline void mmp_overlay_set_win(struct mmp_overlay *overlay,
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struct mmp_win *win)
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{
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if (overlay)
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overlay->ops->set_win(overlay, win);
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}
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static inline int mmp_overlay_set_addr(struct mmp_overlay *overlay,
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struct mmp_addr *addr)
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{
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if (overlay)
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return overlay->ops->set_addr(overlay, addr);
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return 0;
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}
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/*
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* driver data is set from each detailed ctrl driver for path usage
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* it defined a common interface that plat driver need to implement
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*/
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struct mmp_path_info {
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/* driver data, set when registed*/
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const char *name;
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struct device *dev;
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int id;
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int output_type;
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int overlay_num;
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void (*set_mode)(struct mmp_path *path, struct mmp_mode *mode);
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void (*set_onoff)(struct mmp_path *path, int status);
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struct mmp_overlay_ops *overlay_ops;
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void *plat_data;
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};
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extern struct mmp_path *mmp_register_path(
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struct mmp_path_info *info);
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extern void mmp_unregister_path(struct mmp_path *path);
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extern void mmp_register_panel(struct mmp_panel *panel);
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extern void mmp_unregister_panel(struct mmp_panel *panel);
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/* defintions for platform data */
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/* interface for buffer driver */
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struct mmp_buffer_driver_mach_info {
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const char *name;
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const char *path_name;
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int overlay_id;
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int dmafetch_id;
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int default_pixfmt;
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};
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/* interface for controllers driver */
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struct mmp_mach_path_config {
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const char *name;
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int overlay_num;
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int output_type;
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u32 path_config;
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u32 link_config;
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u32 dsi_rbswap;
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};
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struct mmp_mach_plat_info {
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const char *name;
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const char *clk_name;
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int path_num;
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struct mmp_mach_path_config *paths;
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};
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/* interface for panel drivers */
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struct mmp_mach_panel_info {
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const char *name;
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void (*plat_set_onoff)(int status);
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const char *plat_path_name;
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};
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#endif /* _MMP_DISP_H_ */
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