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7866b9faf0
Added support for the new command opcode FE0B
(HCI Intel PPAG Enable).
btmon log:
< HCI Command: Intel PPAG Enable (0x3f|0x020b) plen 4
Enable: 0x00000002
> HCI Event: Command Complete (0x0e) plen 4
Intel PPAG Enable (0x3f|0x020b) ncmd 1
Status: Success (0x00)
Signed-off-by: Seema Sreemantha <seema.sreemantha@intel.com>
Signed-off-by: Lokendra Singh <lokendra.singh@intel.com>
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
326 lines
7.6 KiB
C
326 lines
7.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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*
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* Bluetooth support for Intel devices
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*
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* Copyright (C) 2015 Intel Corporation
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*/
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/* List of tlv type */
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enum {
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INTEL_TLV_CNVI_TOP = 0x10,
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INTEL_TLV_CNVR_TOP,
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INTEL_TLV_CNVI_BT,
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INTEL_TLV_CNVR_BT,
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INTEL_TLV_CNVI_OTP,
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INTEL_TLV_CNVR_OTP,
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INTEL_TLV_DEV_REV_ID,
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INTEL_TLV_USB_VENDOR_ID,
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INTEL_TLV_USB_PRODUCT_ID,
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INTEL_TLV_PCIE_VENDOR_ID,
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INTEL_TLV_PCIE_DEVICE_ID,
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INTEL_TLV_PCIE_SUBSYSTEM_ID,
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INTEL_TLV_IMAGE_TYPE,
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INTEL_TLV_TIME_STAMP,
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INTEL_TLV_BUILD_TYPE,
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INTEL_TLV_BUILD_NUM,
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INTEL_TLV_FW_BUILD_PRODUCT,
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INTEL_TLV_FW_BUILD_HW,
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INTEL_TLV_FW_STEP,
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INTEL_TLV_BT_SPEC,
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INTEL_TLV_MFG_NAME,
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INTEL_TLV_HCI_REV,
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INTEL_TLV_LMP_SUBVER,
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INTEL_TLV_OTP_PATCH_VER,
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INTEL_TLV_SECURE_BOOT,
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INTEL_TLV_KEY_FROM_HDR,
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INTEL_TLV_OTP_LOCK,
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INTEL_TLV_API_LOCK,
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INTEL_TLV_DEBUG_LOCK,
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INTEL_TLV_MIN_FW,
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INTEL_TLV_LIMITED_CCE,
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INTEL_TLV_SBE_TYPE,
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INTEL_TLV_OTP_BDADDR,
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INTEL_TLV_UNLOCKED_STATE
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};
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struct intel_tlv {
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u8 type;
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u8 len;
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u8 val[];
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} __packed;
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struct intel_version_tlv {
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u32 cnvi_top;
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u32 cnvr_top;
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u32 cnvi_bt;
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u32 cnvr_bt;
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u16 dev_rev_id;
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u8 img_type;
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u16 timestamp;
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u8 build_type;
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u32 build_num;
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u8 secure_boot;
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u8 otp_lock;
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u8 api_lock;
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u8 debug_lock;
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u8 min_fw_build_nn;
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u8 min_fw_build_cw;
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u8 min_fw_build_yy;
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u8 limited_cce;
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u8 sbe_type;
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bdaddr_t otp_bd_addr;
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};
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struct intel_version {
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u8 status;
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u8 hw_platform;
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u8 hw_variant;
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u8 hw_revision;
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u8 fw_variant;
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u8 fw_revision;
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u8 fw_build_num;
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u8 fw_build_ww;
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u8 fw_build_yy;
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u8 fw_patch_num;
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} __packed;
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struct intel_boot_params {
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__u8 status;
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__u8 otp_format;
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__u8 otp_content;
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__u8 otp_patch;
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__le16 dev_revid;
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__u8 secure_boot;
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__u8 key_from_hdr;
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__u8 key_type;
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__u8 otp_lock;
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__u8 api_lock;
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__u8 debug_lock;
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bdaddr_t otp_bdaddr;
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__u8 min_fw_build_nn;
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__u8 min_fw_build_cw;
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__u8 min_fw_build_yy;
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__u8 limited_cce;
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__u8 unlocked_state;
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} __packed;
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struct intel_bootup {
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__u8 zero;
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__u8 num_cmds;
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__u8 source;
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__u8 reset_type;
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__u8 reset_reason;
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__u8 ddc_status;
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} __packed;
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struct intel_secure_send_result {
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__u8 result;
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__le16 opcode;
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__u8 status;
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} __packed;
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struct intel_reset {
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__u8 reset_type;
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__u8 patch_enable;
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__u8 ddc_reload;
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__u8 boot_option;
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__le32 boot_param;
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} __packed;
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struct intel_debug_features {
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__u8 page1[16];
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} __packed;
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struct intel_offload_use_cases {
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__u8 status;
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__u8 preset[8];
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} __packed;
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#define INTEL_OP_PPAG_CMD 0xFE0B
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struct hci_ppag_enable_cmd {
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__le32 ppag_enable_flags;
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} __packed;
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#define INTEL_TLV_TYPE_ID 0x01
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#define INTEL_TLV_SYSTEM_EXCEPTION 0x00
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#define INTEL_TLV_FATAL_EXCEPTION 0x01
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#define INTEL_TLV_DEBUG_EXCEPTION 0x02
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#define INTEL_TLV_TEST_EXCEPTION 0xDE
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#define INTEL_HW_PLATFORM(cnvx_bt) ((u8)(((cnvx_bt) & 0x0000ff00) >> 8))
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#define INTEL_HW_VARIANT(cnvx_bt) ((u8)(((cnvx_bt) & 0x003f0000) >> 16))
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#define INTEL_CNVX_TOP_TYPE(cnvx_top) ((cnvx_top) & 0x00000fff)
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#define INTEL_CNVX_TOP_STEP(cnvx_top) (((cnvx_top) & 0x0f000000) >> 24)
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#define INTEL_CNVX_TOP_PACK_SWAB(t, s) __swab16(((__u16)(((t) << 4) | (s))))
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enum {
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INTEL_BOOTLOADER,
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INTEL_DOWNLOADING,
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INTEL_FIRMWARE_LOADED,
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INTEL_FIRMWARE_FAILED,
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INTEL_BOOTING,
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INTEL_BROKEN_INITIAL_NCMD,
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INTEL_BROKEN_SHUTDOWN_LED,
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INTEL_ROM_LEGACY,
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INTEL_ROM_LEGACY_NO_WBS_SUPPORT,
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INTEL_ACPI_RESET_ACTIVE,
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__INTEL_NUM_FLAGS,
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};
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struct btintel_data {
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DECLARE_BITMAP(flags, __INTEL_NUM_FLAGS);
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int (*acpi_reset_method)(struct hci_dev *hdev);
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};
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#define btintel_set_flag(hdev, nr) \
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do { \
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struct btintel_data *intel = hci_get_priv((hdev)); \
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set_bit((nr), intel->flags); \
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} while (0)
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#define btintel_clear_flag(hdev, nr) \
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do { \
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struct btintel_data *intel = hci_get_priv((hdev)); \
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clear_bit((nr), intel->flags); \
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} while (0)
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#define btintel_wake_up_flag(hdev, nr) \
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do { \
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struct btintel_data *intel = hci_get_priv((hdev)); \
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wake_up_bit(intel->flags, (nr)); \
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} while (0)
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#define btintel_get_flag(hdev) \
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(((struct btintel_data *)hci_get_priv(hdev))->flags)
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#define btintel_test_flag(hdev, nr) test_bit((nr), btintel_get_flag(hdev))
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#define btintel_test_and_clear_flag(hdev, nr) test_and_clear_bit((nr), btintel_get_flag(hdev))
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#define btintel_wait_on_flag_timeout(hdev, nr, m, to) \
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wait_on_bit_timeout(btintel_get_flag(hdev), (nr), m, to)
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#if IS_ENABLED(CONFIG_BT_INTEL)
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int btintel_check_bdaddr(struct hci_dev *hdev);
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int btintel_enter_mfg(struct hci_dev *hdev);
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int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched);
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int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
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int btintel_set_diag(struct hci_dev *hdev, bool enable);
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int btintel_version_info(struct hci_dev *hdev, struct intel_version *ver);
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int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name);
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int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug);
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int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver);
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struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read,
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u16 opcode_write);
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int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param);
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int btintel_read_boot_params(struct hci_dev *hdev,
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struct intel_boot_params *params);
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int btintel_download_firmware(struct hci_dev *dev, struct intel_version *ver,
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const struct firmware *fw, u32 *boot_param);
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int btintel_configure_setup(struct hci_dev *hdev, const char *driver_name);
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int btintel_recv_event(struct hci_dev *hdev, struct sk_buff *skb);
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void btintel_bootup(struct hci_dev *hdev, const void *ptr, unsigned int len);
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void btintel_secure_send_result(struct hci_dev *hdev,
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const void *ptr, unsigned int len);
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int btintel_set_quality_report(struct hci_dev *hdev, bool enable);
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#else
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static inline int btintel_check_bdaddr(struct hci_dev *hdev)
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{
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return -EOPNOTSUPP;
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}
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static inline int btintel_enter_mfg(struct hci_dev *hdev)
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{
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return -EOPNOTSUPP;
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}
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static inline int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched)
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{
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return -EOPNOTSUPP;
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}
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static inline int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
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{
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return -EOPNOTSUPP;
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}
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static inline int btintel_set_diag(struct hci_dev *hdev, bool enable)
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{
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return -EOPNOTSUPP;
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}
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static inline int btintel_version_info(struct hci_dev *hdev,
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struct intel_version *ver)
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{
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return -EOPNOTSUPP;
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}
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static inline int btintel_load_ddc_config(struct hci_dev *hdev,
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const char *ddc_name)
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{
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return -EOPNOTSUPP;
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}
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static inline int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug)
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{
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return -EOPNOTSUPP;
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}
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static inline int btintel_read_version(struct hci_dev *hdev,
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struct intel_version *ver)
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{
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return -EOPNOTSUPP;
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}
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static inline struct regmap *btintel_regmap_init(struct hci_dev *hdev,
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u16 opcode_read,
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u16 opcode_write)
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{
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return ERR_PTR(-EINVAL);
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}
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static inline int btintel_send_intel_reset(struct hci_dev *hdev,
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u32 reset_param)
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{
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return -EOPNOTSUPP;
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}
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static inline int btintel_read_boot_params(struct hci_dev *hdev,
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struct intel_boot_params *params)
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{
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return -EOPNOTSUPP;
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}
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static inline int btintel_download_firmware(struct hci_dev *dev,
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const struct firmware *fw,
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u32 *boot_param)
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{
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return -EOPNOTSUPP;
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}
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static inline int btintel_configure_setup(struct hci_dev *hdev,
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const char *driver_name)
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{
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return -ENODEV;
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}
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static inline void btintel_bootup(struct hci_dev *hdev,
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const void *ptr, unsigned int len)
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{
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}
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static inline void btintel_secure_send_result(struct hci_dev *hdev,
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const void *ptr, unsigned int len)
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{
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}
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static inline int btintel_set_quality_report(struct hci_dev *hdev, bool enable)
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{
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return -ENODEV;
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}
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#endif
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