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As reported in [1], rename the k2* dts files to keystone-* files this will force consistency throughout. Script for the same (and hand modified for Makefile and MAINTAINERS files): for i in arch/arm/boot/dts/k2* do b=`basename $i`; git mv $i arch/arm/boot/dts/keystone-$b; sed -i -e "s/$b/keystone-$b/g" arch/arm/boot/dts/*[si] done NOTE: bootloaders that depend on older dtb names will need to be updated as well. [1] http://marc.info/?l=linux-arm-kernel&m=145637407804754&w=2 Reported-by: Olof Johansson <olof@lixom.net> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
155 lines
2.8 KiB
Plaintext
155 lines
2.8 KiB
Plaintext
/*
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* Copyright 2013-2014 Texas Instruments, Inc.
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*
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* Keystone 2 Edison EVM device tree
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "keystone.dtsi"
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#include "keystone-k2e.dtsi"
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/ {
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compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
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model = "Texas Instruments Keystone 2 Edison EVM";
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soc {
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clocks {
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refclksys: refclksys {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "refclk-sys";
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};
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refclkpass: refclkpass {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "refclk-pass";
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};
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refclkddr3a: refclkddr3a {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "refclk-ddr3a";
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};
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};
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};
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};
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&usb_phy {
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status = "okay";
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};
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&usb {
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status = "okay";
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};
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&usb1_phy {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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&i2c0 {
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dtt@50 {
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compatible = "at,24c1024";
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reg = <0x50>;
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};
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};
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&aemif {
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cs0 {
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#address-cells = <2>;
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#size-cells = <1>;
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clock-ranges;
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ranges;
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ti,cs-chipselect = <0>;
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/* all timings in nanoseconds */
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ti,cs-min-turnaround-ns = <12>;
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ti,cs-read-hold-ns = <6>;
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ti,cs-read-strobe-ns = <23>;
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ti,cs-read-setup-ns = <9>;
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ti,cs-write-hold-ns = <8>;
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ti,cs-write-strobe-ns = <23>;
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ti,cs-write-setup-ns = <8>;
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nand@0,0 {
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compatible = "ti,keystone-nand","ti,davinci-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0 0 0x4000000
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1 0 0x0000100>;
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ti,davinci-chipselect = <0>;
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ti,davinci-mask-ale = <0x2000>;
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ti,davinci-mask-cle = <0x4000>;
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ti,davinci-mask-chipsel = <0>;
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nand-ecc-mode = "hw";
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ti,davinci-ecc-bits = <4>;
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nand-on-flash-bbt;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x100000>;
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read-only;
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};
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partition@100000 {
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label = "params";
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reg = <0x100000 0x80000>;
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read-only;
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};
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partition@180000 {
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label = "ubifs";
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reg = <0x180000 0x1FE80000>;
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};
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};
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};
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};
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&spi0 {
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nor_flash: n25q128a11@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "Micron,n25q128a11";
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spi-max-frequency = <54000000>;
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m25p,fast-read;
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reg = <0>;
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partition@0 {
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label = "u-boot-spl";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@1 {
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label = "misc";
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reg = <0x80000 0xf80000>;
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};
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};
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};
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&mdio {
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status = "ok";
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ethphy0: ethernet-phy@0 {
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compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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};
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ethphy1: ethernet-phy@1 {
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compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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};
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