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49ac67e0c3
VC4 is the GPU (display and 3D) present on the 283x. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
299 lines
6.7 KiB
Plaintext
299 lines
6.7 KiB
Plaintext
#include <dt-bindings/pinctrl/bcm2835.h>
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#include <dt-bindings/clock/bcm2835.h>
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#include <dt-bindings/clock/bcm2835-aux.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "skeleton.dtsi"
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/* This include file covers the common peripherals and configuration between
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* bcm2835 and bcm2836 implementations, leaving the CPU configuration to
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* bcm2835.dtsi and bcm2836.dtsi.
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*/
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/ {
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compatible = "brcm,bcm2835";
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model = "BCM2835";
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interrupt-parent = <&intc>;
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chosen {
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bootargs = "earlyprintk console=ttyAMA0";
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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timer@7e003000 {
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compatible = "brcm,bcm2835-system-timer";
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reg = <0x7e003000 0x1000>;
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interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
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/* This could be a reference to BCM2835_CLOCK_TIMER,
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* but we don't have the driver using the common clock
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* support yet.
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*/
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clock-frequency = <1000000>;
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};
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dma: dma@7e007000 {
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compatible = "brcm,bcm2835-dma";
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reg = <0x7e007000 0xf00>;
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interrupts = <1 16>,
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<1 17>,
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<1 18>,
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<1 19>,
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<1 20>,
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<1 21>,
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<1 22>,
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<1 23>,
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<1 24>,
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<1 25>,
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<1 26>,
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<1 27>,
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<1 28>;
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#dma-cells = <1>;
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brcm,dma-channel-mask = <0x7f35>;
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};
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intc: interrupt-controller@7e00b200 {
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compatible = "brcm,bcm2835-armctrl-ic";
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reg = <0x7e00b200 0x200>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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watchdog@7e100000 {
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compatible = "brcm,bcm2835-pm-wdt";
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reg = <0x7e100000 0x28>;
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};
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clocks: cprman@7e101000 {
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compatible = "brcm,bcm2835-cprman";
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#clock-cells = <1>;
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reg = <0x7e101000 0x2000>;
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/* CPRMAN derives everything from the platform's
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* oscillator.
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*/
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clocks = <&clk_osc>;
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};
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rng@7e104000 {
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compatible = "brcm,bcm2835-rng";
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reg = <0x7e104000 0x10>;
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};
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mailbox: mailbox@7e00b800 {
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compatible = "brcm,bcm2835-mbox";
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reg = <0x7e00b880 0x40>;
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interrupts = <0 1>;
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#mbox-cells = <0>;
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};
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gpio: gpio@7e200000 {
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compatible = "brcm,bcm2835-gpio";
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reg = <0x7e200000 0xb4>;
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/*
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* The GPIO IP block is designed for 3 banks of GPIOs.
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* Each bank has a GPIO interrupt for itself.
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* There is an overall "any bank" interrupt.
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* In order, these are GIC interrupts 17, 18, 19, 20.
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* Since the BCM2835 only has 2 banks, the 2nd bank
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* interrupt output appears to be mirrored onto the
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* 3rd bank's interrupt signal.
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* So, a bank0 interrupt shows up on 17, 20, and
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* a bank1 interrupt shows up on 18, 19, 20!
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*/
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interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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uart0: serial@7e201000 {
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compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
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reg = <0x7e201000 0x1000>;
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interrupts = <2 25>;
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clocks = <&clocks BCM2835_CLOCK_UART>,
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<&clocks BCM2835_CLOCK_VPU>;
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clock-names = "uartclk", "apb_pclk";
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arm,primecell-periphid = <0x00241011>;
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};
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i2s: i2s@7e203000 {
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compatible = "brcm,bcm2835-i2s";
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reg = <0x7e203000 0x20>,
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<0x7e101098 0x02>;
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dmas = <&dma 2>,
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<&dma 3>;
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dma-names = "tx", "rx";
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status = "disabled";
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};
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spi: spi@7e204000 {
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compatible = "brcm,bcm2835-spi";
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reg = <0x7e204000 0x1000>;
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interrupts = <2 22>;
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clocks = <&clocks BCM2835_CLOCK_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c0: i2c@7e205000 {
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compatible = "brcm,bcm2835-i2c";
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reg = <0x7e205000 0x1000>;
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interrupts = <2 21>;
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clocks = <&clocks BCM2835_CLOCK_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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pixelvalve@7e206000 {
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compatible = "brcm,bcm2835-pixelvalve0";
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reg = <0x7e206000 0x100>;
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interrupts = <2 13>; /* pwa0 */
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};
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pixelvalve@7e207000 {
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compatible = "brcm,bcm2835-pixelvalve1";
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reg = <0x7e207000 0x100>;
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interrupts = <2 14>; /* pwa1 */
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};
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aux: aux@0x7e215000 {
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compatible = "brcm,bcm2835-aux";
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#clock-cells = <1>;
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reg = <0x7e215000 0x8>;
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clocks = <&clocks BCM2835_CLOCK_VPU>;
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};
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uart1: serial@7e215040 {
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compatible = "brcm,bcm2835-aux-uart";
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reg = <0x7e215040 0x40>;
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interrupts = <1 29>;
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clocks = <&aux BCM2835_AUX_CLOCK_UART>;
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status = "disabled";
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};
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spi1: spi@7e215080 {
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compatible = "brcm,bcm2835-aux-spi";
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reg = <0x7e215080 0x40>;
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interrupts = <1 29>;
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clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi2: spi@7e2150c0 {
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compatible = "brcm,bcm2835-aux-spi";
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reg = <0x7e2150c0 0x40>;
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interrupts = <1 29>;
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clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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pwm: pwm@7e20c000 {
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compatible = "brcm,bcm2835-pwm";
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reg = <0x7e20c000 0x28>;
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clocks = <&clocks BCM2835_CLOCK_PWM>;
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assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
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assigned-clock-rates = <10000000>;
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#pwm-cells = <2>;
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status = "disabled";
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};
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sdhci: sdhci@7e300000 {
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compatible = "brcm,bcm2835-sdhci";
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reg = <0x7e300000 0x100>;
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interrupts = <2 30>;
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clocks = <&clocks BCM2835_CLOCK_EMMC>;
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status = "disabled";
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};
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hvs@7e400000 {
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compatible = "brcm,bcm2835-hvs";
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reg = <0x7e400000 0x6000>;
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interrupts = <2 1>;
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};
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i2c1: i2c@7e804000 {
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compatible = "brcm,bcm2835-i2c";
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reg = <0x7e804000 0x1000>;
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interrupts = <2 21>;
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clocks = <&clocks BCM2835_CLOCK_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c2: i2c@7e805000 {
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compatible = "brcm,bcm2835-i2c";
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reg = <0x7e805000 0x1000>;
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interrupts = <2 21>;
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clocks = <&clocks BCM2835_CLOCK_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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pixelvalve@7e807000 {
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compatible = "brcm,bcm2835-pixelvalve2";
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reg = <0x7e807000 0x100>;
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interrupts = <2 10>; /* pixelvalve */
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};
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hdmi: hdmi@7e902000 {
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compatible = "brcm,bcm2835-hdmi";
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reg = <0x7e902000 0x600>,
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<0x7e808000 0x100>;
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interrupts = <2 8>, <2 9>;
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ddc = <&i2c2>;
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clocks = <&clocks BCM2835_PLLH_PIX>,
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<&clocks BCM2835_CLOCK_HSM>;
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clock-names = "pixel", "hdmi";
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status = "disabled";
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};
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usb: usb@7e980000 {
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compatible = "brcm,bcm2835-usb";
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reg = <0x7e980000 0x10000>;
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interrupts = <1 9>;
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};
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v3d: v3d@7ec00000 {
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compatible = "brcm,bcm2835-v3d";
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reg = <0x7ec00000 0x1000>;
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interrupts = <1 10>;
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};
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vc4: gpu {
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compatible = "brcm,bcm2835-vc4";
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};
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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/* The oscillator is the root of the clock tree. */
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clk_osc: clock@3 {
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compatible = "fixed-clock";
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reg = <3>;
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#clock-cells = <0>;
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clock-output-names = "osc";
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clock-frequency = <19200000>;
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};
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};
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};
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