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8cc7f5338e
Move the existing clock code in mach-msm to the common clock framework. We lose our capability to set the rate of and enable a clock through debugfs. This is ok though because the debugfs features are mainly used for testing and development of new clock code. To maintain compatibility with the original MSM clock code we make a wrapper for clk_reset() that calls the struct msm_clk specific reset function. This is necessary for the usb and sdcc devices on MSM until a better suited API is made available. Cc: Saravana Kannan <skannan@codeaurora.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
247 lines
7.0 KiB
C
247 lines
7.0 KiB
C
/*
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* Copyright (C) 2008 Google, Inc.
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* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/clkdev.h>
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#include <mach/irqs.h>
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#include <mach/msm_iomap.h>
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#include <mach/dma.h>
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#include <mach/board.h>
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#include "devices.h"
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#include "smd_private.h"
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#include <asm/mach/flash.h>
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#include "clock.h"
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#include "clock-pcom.h"
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#include <linux/platform_data/mmc-msm_sdcc.h>
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static struct resource msm_gpio_resources[] = {
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{
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.start = 32 + 18,
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.end = 32 + 18,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = 32 + 19,
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.end = 32 + 19,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = 0xac001000,
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.end = 0xac001000 + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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.name = "gpio1"
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},
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{
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.start = 0xac101400,
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.end = 0xac101400 + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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.name = "gpio2"
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},
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};
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struct platform_device msm_device_gpio_7x30 = {
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.name = "gpio-msm-7x30",
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.num_resources = ARRAY_SIZE(msm_gpio_resources),
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.resource = msm_gpio_resources,
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};
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static struct resource resources_uart2[] = {
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{
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.start = INT_UART2,
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.end = INT_UART2,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = MSM_UART2_PHYS,
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.end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
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.flags = IORESOURCE_MEM,
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.name = "uart_resource"
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},
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};
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struct platform_device msm_device_uart2 = {
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.name = "msm_serial",
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.id = 1,
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.num_resources = ARRAY_SIZE(resources_uart2),
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.resource = resources_uart2,
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};
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struct platform_device msm_device_smd = {
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.name = "msm_smd",
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.id = -1,
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};
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static struct resource resources_otg[] = {
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{
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.start = MSM_HSUSB_PHYS,
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.end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_USB_HS,
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.end = INT_USB_HS,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device msm_device_otg = {
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.name = "msm_otg",
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.id = -1,
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.num_resources = ARRAY_SIZE(resources_otg),
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.resource = resources_otg,
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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};
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static struct resource resources_hsusb[] = {
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{
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.start = MSM_HSUSB_PHYS,
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.end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_USB_HS,
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.end = INT_USB_HS,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device msm_device_hsusb = {
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.name = "msm_hsusb",
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.id = -1,
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.num_resources = ARRAY_SIZE(resources_hsusb),
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.resource = resources_hsusb,
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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};
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static u64 dma_mask = 0xffffffffULL;
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static struct resource resources_hsusb_host[] = {
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{
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.start = MSM_HSUSB_PHYS,
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.end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_USB_HS,
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.end = INT_USB_HS,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device msm_device_hsusb_host = {
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.name = "msm_hsusb_host",
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.id = -1,
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.num_resources = ARRAY_SIZE(resources_hsusb_host),
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.resource = resources_hsusb_host,
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.dev = {
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.dma_mask = &dma_mask,
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.coherent_dma_mask = 0xffffffffULL,
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},
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};
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static struct clk_pcom_desc msm_clocks_7x30[] = {
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CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
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CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0),
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CLK_PCOM("cam_m_clk", CAM_M_CLK, NULL, 0),
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CLK_PCOM("camif_pad_pclk", CAMIF_PAD_P_CLK, NULL, OFF),
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CLK_PCOM("ce_clk", CE_CLK, NULL, 0),
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CLK_PCOM("codec_ssbi_clk", CODEC_SSBI_CLK, NULL, 0),
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CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
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CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
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CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX),
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CLK_PCOM("emdh_pclk", EMDH_P_CLK, NULL, OFF),
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CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
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CLK_PCOM("grp_2d_clk", GRP_2D_CLK, NULL, 0),
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CLK_PCOM("grp_2d_pclk", GRP_2D_P_CLK, NULL, 0),
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CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0),
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CLK_PCOM("grp_pclk", GRP_3D_P_CLK, NULL, 0),
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CLK_PCOM("hdmi_clk", HDMI_CLK, NULL, 0),
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CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
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CLK_PCOM("jpeg_clk", JPEG_CLK, NULL, OFF),
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CLK_PCOM("jpeg_pclk", JPEG_P_CLK, NULL, OFF),
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CLK_PCOM("lpa_codec_clk", LPA_CODEC_CLK, NULL, 0),
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CLK_PCOM("lpa_core_clk", LPA_CORE_CLK, NULL, 0),
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CLK_PCOM("lpa_pclk", LPA_P_CLK, NULL, 0),
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CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
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CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX),
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CLK_PCOM("mddi_pclk", PMDH_P_CLK, NULL, 0),
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CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
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CLK_PCOM("mdp_pclk", MDP_P_CLK, NULL, 0),
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CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0),
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CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0),
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CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0),
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CLK_PCOM("mfc_clk", MFC_CLK, NULL, 0),
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CLK_PCOM("mfc_div2_clk", MFC_DIV2_CLK, NULL, 0),
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CLK_PCOM("mfc_pclk", MFC_P_CLK, NULL, 0),
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CLK_PCOM("mi2s_m_clk", MI2S_M_CLK, NULL, 0),
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CLK_PCOM("mi2s_s_clk", MI2S_S_CLK, NULL, 0),
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CLK_PCOM("mi2s_codec_rx_m_clk", MI2S_CODEC_RX_M_CLK, NULL, 0),
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CLK_PCOM("mi2s_codec_rx_s_clk", MI2S_CODEC_RX_S_CLK, NULL, 0),
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CLK_PCOM("mi2s_codec_tx_m_clk", MI2S_CODEC_TX_M_CLK, NULL, 0),
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CLK_PCOM("mi2s_codec_tx_s_clk", MI2S_CODEC_TX_S_CLK, NULL, 0),
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CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN),
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CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
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CLK_PCOM("rotator_clk", AXI_ROTATOR_CLK, NULL, 0),
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CLK_PCOM("rotator_imem_clk", ROTATOR_IMEM_CLK, NULL, OFF),
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CLK_PCOM("rotator_pclk", ROTATOR_P_CLK, NULL, OFF),
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CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
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CLK_PCOM("spi_clk", SPI_CLK, NULL, 0),
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CLK_PCOM("spi_pclk", SPI_P_CLK, NULL, 0),
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CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
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CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
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CLK_PCOM("uart_clk", UART2_CLK, "msm_serial.1", 0),
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CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0),
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CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF),
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CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF),
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CLK_PCOM("usb_hs_core_clk", USB_HS_CORE_CLK, NULL, OFF),
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CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF),
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CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF),
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CLK_PCOM("usb_hs2_core_clk", USB_HS2_CORE_CLK, NULL, OFF),
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CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF),
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CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF),
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CLK_PCOM("usb_hs3_core_clk", USB_HS3_CORE_CLK, NULL, OFF),
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CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN),
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CLK_PCOM("vfe_camif_clk", VFE_CAMIF_CLK, NULL, 0),
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CLK_PCOM("vfe_clk", VFE_CLK, NULL, 0),
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CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, 0),
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CLK_PCOM("vfe_pclk", VFE_P_CLK, NULL, OFF),
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CLK_PCOM("vpe_clk", VPE_CLK, NULL, 0),
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/* 7x30 v2 hardware only. */
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CLK_PCOM("csi_clk", CSI0_CLK, NULL, 0),
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CLK_PCOM("csi_pclk", CSI0_P_CLK, NULL, 0),
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CLK_PCOM("csi_vfe_clk", CSI0_VFE_CLK, NULL, 0),
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};
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static struct pcom_clk_pdata msm_clock_7x30_pdata = {
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.lookup = msm_clocks_7x30,
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.num_lookups = ARRAY_SIZE(msm_clocks_7x30),
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};
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struct platform_device msm_clock_7x30 = {
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.name = "msm-clock-pcom",
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.dev.platform_data = &msm_clock_7x30_pdata,
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};
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