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-----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAl3leXUUHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vyY3g/9FAVVdPEaadNtAhQ/zIxcjozDovKq 0q7yOA3aTBTUoNEinm88an6p0dcC4gNKtGukXmzVH2Hhxm9kLRdtpZGYY00tpLUB 9rI7XsgwwHa+hLwsHbIs507sKGFGy5FLr0ChTTGLDEMppnEvjA2hZooYmcB/OgrC LlFcwbNKGOk/Si9u2bF2nLO0JDoVHnwzpF99saew/nqc7Lfj9e9IPZFom+VjPBUh AOvRp2H7uBN+WQlpLeFeMDDoeXh34lX0kYqIV/cVkXVnknDGYKV2CBTg2aeX7jd0 QiPHZh6zlW8zNQgaCZRiBAbatVEOnRMRJ++yiqB8hBYp1LMXm6kJ01YSQpXkugoY Vp9dtzzTARWV/XkKwD4brw9ZEmIDnO+Ed2x2VbUkPJVcXAvzSQWAx82IU0Iuqmcb 9qr6U2Zf/Xk5aFlGPYVH8QOG+QqzIbZNRQ7NlhDlITyW4P6QPu0mw374yYP2wDGL sP5YSS3YGa0sQcEgDtVnd4z+WTZI4AwXLPaeaLkDhdfHp2FsERUY4TrPs33J99xw og4EyokVFzjYzlnBPU6WWn7LL+jj5ccXkL3MA4DR4FJOnNGHh7NXfQUH56rrgsq7 F9/8shL5DuTbQkde1uSyUG9Iq/RigVLlV5DQavFm3dSXvZi0E16t5alC5URNTzk7 at8Bogn53QhlmYc= =uUXw -----END PGP SIGNATURE----- Merge tag 'pci-v5.5-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Warn if a host bridge has no NUMA info (Yunsheng Lin) - Add PCI_STD_NUM_BARS for the number of standard BARs (Denis Efremov) Resource management: - Fix boot-time Embedded Controller GPE storm caused by incorrect resource assignment after ACPI Bus Check Notification (Mika Westerberg) - Protect pci_reassign_bridge_resources() against concurrent addition/removal (Benjamin Herrenschmidt) - Fix bridge dma_ranges resource list cleanup (Rob Herring) - Add "pci=hpmmiosize" and "pci=hpmmioprefsize" parameters to control the MMIO and prefetchable MMIO window sizes of hotplug bridges independently (Nicholas Johnson) - Fix MMIO/MMIO_PREF window assignment that assigned more space than desired (Nicholas Johnson) - Only enforce bus numbers from bridge EA if the bridge has EA devices downstream (Subbaraya Sundeep) - Consolidate DT "dma-ranges" parsing and convert all host drivers to use shared parsing (Rob Herring) Error reporting: - Restore AER capability after resume (Mayurkumar Patel) - Add PoisonTLPBlocked AER counter (Rajat Jain) - Use for_each_set_bit() to simplify AER code (Andy Shevchenko) - Fix AER kernel-doc (Andy Shevchenko) - Add "pcie_ports=dpc-native" parameter to allow native use of DPC even if platform didn't grant control over AER (Olof Johansson) Hotplug: - Avoid returning prematurely from sysfs requests to enable or disable a PCIe hotplug slot (Lukas Wunner) - Don't disable interrupts twice when suspending hotplug ports (Mika Westerberg) - Fix deadlocks when PCIe ports are hot-removed while suspended (Mika Westerberg) Power management: - Remove unnecessary ASPM locking (Bjorn Helgaas) - Add support for disabling L1 PM Substates (Heiner Kallweit) - Allow re-enabling Clock PM after it has been disabled (Heiner Kallweit) - Add sysfs attributes for controlling ASPM link states (Heiner Kallweit) - Remove CONFIG_PCIEASPM_DEBUG, including "link_state" and "clk_ctl" sysfs files (Heiner Kallweit) - Avoid AMD FCH XHCI USB PME# from D0 defect that prevents wakeup on USB 2.0 or 1.1 connect events (Kai-Heng Feng) - Move power state check out of pci_msi_supported() (Bjorn Helgaas) - Fix incorrect MSI-X masking on resume and revert related nvme quirk for Kingston NVME SSD running FW E8FK11.T (Jian-Hong Pan) - Always return devices to D0 when thawing to fix hibernation with drivers like mlx4 that used legacy power management (previously we only did it for drivers with new power management ops) (Dexuan Cui) - Clear PCIe PME Status even for legacy power management (Bjorn Helgaas) - Fix PCI PM documentation errors (Bjorn Helgaas) - Use dev_printk() for more power management messages (Bjorn Helgaas) - Apply D2 delay as milliseconds, not microseconds (Bjorn Helgaas) - Convert xen-platform from legacy to generic power management (Bjorn Helgaas) - Removed unused .resume_early() and .suspend_late() legacy power management hooks (Bjorn Helgaas) - Rearrange power management code for clarity (Rafael J. Wysocki) - Decode power states more clearly ("4" or "D4" really refers to "D3cold") (Bjorn Helgaas) - Notice when reading PM Control register returns an error (~0) instead of interpreting it as being in D3hot (Bjorn Helgaas) - Add missing link delays required by the PCIe spec (Mika Westerberg) Virtualization: - Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI (Bjorn Helgaas) - Allow VFs to use PRI (the PF PRI is shared by the VFs, but the code previously didn't recognize that) (Kuppuswamy Sathyanarayanan) - Allow VFs to use PASID (the PF PASID capability is shared by the VFs, but the code previously didn't recognize that) (Kuppuswamy Sathyanarayanan) - Disconnect PF and VF ATS enablement, since ATS in PFs and associated VFs can be enabled independently (Kuppuswamy Sathyanarayanan) - Cache PRI and PASID capability offsets (Kuppuswamy Sathyanarayanan) - Cache the PRI PRG Response PASID Required bit (Bjorn Helgaas) - Consolidate ATS declarations in linux/pci-ats.h (Krzysztof Wilczynski) - Remove unused PRI and PASID stubs (Bjorn Helgaas) - Removed unnecessary EXPORT_SYMBOL_GPL() from ATS, PRI, and PASID interfaces that are only used by built-in IOMMU drivers (Bjorn Helgaas) - Hide PRI and PASID state restoration functions used only inside the PCI core (Bjorn Helgaas) - Add a DMA alias quirk for the Intel VCA NTB (Slawomir Pawlowski) - Serialize sysfs sriov_numvfs reads vs writes (Pierre Crégut) - Update Cavium ACS quirk for ThunderX2 and ThunderX3 (George Cherian) - Fix the UPDCR register address in the Intel ACS quirk (Steffen Liebergeld) - Unify ACS quirk implementations (Bjorn Helgaas) Amlogic Meson host bridge driver: - Fix meson PERST# GPIO polarity problem (Remi Pommarel) - Add DT bindings for Amlogic Meson G12A (Neil Armstrong) - Fix meson clock names to match DT bindings (Neil Armstrong) - Add meson support for Amlogic G12A SoC with separate shared PHY (Neil Armstrong) - Add meson extended PCIe PHY functions for Amlogic G12A USB3+PCIe combo PHY (Neil Armstrong) - Add arm64 DT for Amlogic G12A PCIe controller node (Neil Armstrong) - Add commented-out description of VIM3 USB3/PCIe mux in arm64 DT (Neil Armstrong) Broadcom iProc host bridge driver: - Invalidate iProc PAXB address mapping before programming it (Abhishek Shah) - Fix iproc-msi and mvebu __iomem annotations (Ben Dooks) Cadence host bridge driver: - Refactor Cadence PCIe host controller to use as a library for both host and endpoint (Tom Joseph) Freescale Layerscape host bridge driver: - Add layerscape LS1028a support (Xiaowei Bao) Intel VMD host bridge driver: - Add VMD bus 224-255 restriction decode (Jon Derrick) - Add VMD 8086:9A0B device ID (Jon Derrick) - Remove Keith from VMD maintainer list (Keith Busch) Marvell ARMADA 3700 / Aardvark host bridge driver: - Use LTSSM state to build link training flag since Aardvark doesn't implement the Link Training bit (Remi Pommarel) - Delay before training Aardvark link in case PERST# was asserted before the driver probe (Remi Pommarel) - Fix Aardvark issues with Root Control reads and writes (Remi Pommarel) - Don't rely on jiffies in Aardvark config access path since interrupts may be disabled (Remi Pommarel) - Fix Aardvark big-endian support (Grzegorz Jaszczyk) Marvell ARMADA 370 / XP host bridge driver: - Make mvebu_pci_bridge_emul_ops static (Ben Dooks) Microsoft Hyper-V host bridge driver: - Add hibernation support for Hyper-V virtual PCI devices (Dexuan Cui) - Track Hyper-V pci_protocol_version per-hbus, not globally (Dexuan Cui) - Avoid kmemleak false positive on hv hbus buffer (Dexuan Cui) Mobiveil host bridge driver: - Change mobiveil csr_read()/write() function names that conflict with riscv arch functions (Kefeng Wang) NVIDIA Tegra host bridge driver: - Fix Tegra CLKREQ dependency programming (Vidya Sagar) Renesas R-Car host bridge driver: - Remove unnecessary header include from rcar (Andrew Murray) - Tighten register index checking for rcar inbound range programming (Marek Vasut) - Fix rcar inbound range alignment calculation to improve packing of multiple entries (Marek Vasut) - Update rcar MACCTLR setting to match documentation (Yoshihiro Shimoda) - Clear bit 0 of MACCTLR before PCIETCTLR.CFINIT per manual (Yoshihiro Shimoda) - Add Marek Vasut and Yoshihiro Shimoda as R-Car maintainers (Simon Horman) Rockchip host bridge driver: - Make rockchip 0V9 and 1V8 power regulators non-optional (Robin Murphy) Socionext UniPhier host bridge driver: - Set uniphier to host (RC) mode always (Kunihiko Hayashi) Endpoint drivers: - Fix endpoint driver sign extension problem when shifting page number to phys_addr_t (Alan Mikhak) Misc: - Add NumaChip SPDX header (Krzysztof Wilczynski) - Replace EXTRA_CFLAGS with ccflags-y (Krzysztof Wilczynski) - Remove unused includes (Krzysztof Wilczynski) - Removed unused sysfs attribute groups (Ben Dooks) - Remove PTM and ASPM dependencies on PCIEPORTBUS (Bjorn Helgaas) - Add PCIe Link Control 2 register field definitions to replace magic numbers in AMDGPU and Radeon CIK/SI (Bjorn Helgaas) - Fix incorrect Link Control 2 Transmit Margin usage in AMDGPU and Radeon CIK/SI PCIe Gen3 link training (Bjorn Helgaas) - Use pcie_capability_read_word() instead of pci_read_config_word() in AMDGPU and Radeon CIK/SI (Frederick Lawler) - Remove unused pci_irq_get_node() Greg Kroah-Hartman) - Make asm/msi.h mandatory and simplify PCI_MSI_IRQ_DOMAIN Kconfig (Palmer Dabbelt, Michal Simek) - Read all 64 bits of Switchtec part_event_bitmap (Logan Gunthorpe) - Fix erroneous intel-iommu dependency on CONFIG_AMD_IOMMU (Bjorn Helgaas) - Fix bridge emulation big-endian support (Grzegorz Jaszczyk) - Fix dwc find_next_bit() usage (Niklas Cassel) - Fix pcitest.c fd leak (Hewenliang) - Fix typos and comments (Bjorn Helgaas) - Fix Kconfig whitespace errors (Krzysztof Kozlowski)" * tag 'pci-v5.5-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (160 commits) PCI: Remove PCI_MSI_IRQ_DOMAIN architecture whitelist asm-generic: Make msi.h a mandatory include/asm header Revert "nvme: Add quirk for Kingston NVME SSD running FW E8FK11.T" PCI/MSI: Fix incorrect MSI-X masking on resume PCI/MSI: Move power state check out of pci_msi_supported() PCI/MSI: Remove unused pci_irq_get_node() PCI: hv: Avoid a kmemleak false positive caused by the hbus buffer PCI: hv: Change pci_protocol_version to per-hbus PCI: hv: Add hibernation support PCI: hv: Reorganize the code in preparation of hibernation MAINTAINERS: Remove Keith from VMD maintainer PCI/ASPM: Remove PCIEASPM_DEBUG Kconfig option and related code PCI/ASPM: Add sysfs attributes for controlling ASPM link states PCI: Fix indentation drm/radeon: Prefer pcie_capability_read_word() drm/radeon: Replace numbers with PCI_EXP_LNKCTL2 definitions drm/radeon: Correct Transmit Margin masks drm/amdgpu: Prefer pcie_capability_read_word() PCI: uniphier: Set mode register to host mode drm/amdgpu: Replace numbers with PCI_EXP_LNKCTL2 definitions ...
506 lines
12 KiB
C
506 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/err.h>
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#include <linux/pci.h>
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#include <linux/io.h>
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#include <linux/gfp.h>
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#include <linux/export.h>
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#include <linux/of_address.h>
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enum devm_ioremap_type {
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DEVM_IOREMAP = 0,
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DEVM_IOREMAP_NC,
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DEVM_IOREMAP_UC,
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DEVM_IOREMAP_WC,
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};
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void devm_ioremap_release(struct device *dev, void *res)
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{
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iounmap(*(void __iomem **)res);
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}
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static int devm_ioremap_match(struct device *dev, void *res, void *match_data)
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{
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return *(void **)res == match_data;
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}
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static void __iomem *__devm_ioremap(struct device *dev, resource_size_t offset,
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resource_size_t size,
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enum devm_ioremap_type type)
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{
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void __iomem **ptr, *addr = NULL;
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ptr = devres_alloc(devm_ioremap_release, sizeof(*ptr), GFP_KERNEL);
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if (!ptr)
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return NULL;
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switch (type) {
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case DEVM_IOREMAP:
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addr = ioremap(offset, size);
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break;
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case DEVM_IOREMAP_NC:
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addr = ioremap_nocache(offset, size);
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break;
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case DEVM_IOREMAP_UC:
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addr = ioremap_uc(offset, size);
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break;
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case DEVM_IOREMAP_WC:
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addr = ioremap_wc(offset, size);
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break;
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}
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if (addr) {
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*ptr = addr;
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devres_add(dev, ptr);
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} else
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devres_free(ptr);
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return addr;
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}
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/**
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* devm_ioremap - Managed ioremap()
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* @dev: Generic device to remap IO address for
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* @offset: Resource address to map
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* @size: Size of map
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*
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* Managed ioremap(). Map is automatically unmapped on driver detach.
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*/
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void __iomem *devm_ioremap(struct device *dev, resource_size_t offset,
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resource_size_t size)
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{
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return __devm_ioremap(dev, offset, size, DEVM_IOREMAP);
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}
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EXPORT_SYMBOL(devm_ioremap);
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/**
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* devm_ioremap_uc - Managed ioremap_uc()
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* @dev: Generic device to remap IO address for
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* @offset: Resource address to map
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* @size: Size of map
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*
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* Managed ioremap_uc(). Map is automatically unmapped on driver detach.
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*/
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void __iomem *devm_ioremap_uc(struct device *dev, resource_size_t offset,
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resource_size_t size)
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{
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return __devm_ioremap(dev, offset, size, DEVM_IOREMAP_UC);
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}
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EXPORT_SYMBOL_GPL(devm_ioremap_uc);
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/**
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* devm_ioremap_nocache - Managed ioremap_nocache()
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* @dev: Generic device to remap IO address for
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* @offset: Resource address to map
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* @size: Size of map
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*
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* Managed ioremap_nocache(). Map is automatically unmapped on driver
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* detach.
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*/
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void __iomem *devm_ioremap_nocache(struct device *dev, resource_size_t offset,
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resource_size_t size)
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{
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return __devm_ioremap(dev, offset, size, DEVM_IOREMAP_NC);
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}
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EXPORT_SYMBOL(devm_ioremap_nocache);
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/**
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* devm_ioremap_wc - Managed ioremap_wc()
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* @dev: Generic device to remap IO address for
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* @offset: Resource address to map
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* @size: Size of map
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*
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* Managed ioremap_wc(). Map is automatically unmapped on driver detach.
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*/
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void __iomem *devm_ioremap_wc(struct device *dev, resource_size_t offset,
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resource_size_t size)
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{
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return __devm_ioremap(dev, offset, size, DEVM_IOREMAP_WC);
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}
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EXPORT_SYMBOL(devm_ioremap_wc);
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/**
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* devm_iounmap - Managed iounmap()
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* @dev: Generic device to unmap for
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* @addr: Address to unmap
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*
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* Managed iounmap(). @addr must have been mapped using devm_ioremap*().
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*/
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void devm_iounmap(struct device *dev, void __iomem *addr)
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{
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WARN_ON(devres_destroy(dev, devm_ioremap_release, devm_ioremap_match,
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(__force void *)addr));
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iounmap(addr);
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}
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EXPORT_SYMBOL(devm_iounmap);
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static void __iomem *
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__devm_ioremap_resource(struct device *dev, const struct resource *res,
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enum devm_ioremap_type type)
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{
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resource_size_t size;
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void __iomem *dest_ptr;
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BUG_ON(!dev);
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if (!res || resource_type(res) != IORESOURCE_MEM) {
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dev_err(dev, "invalid resource\n");
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return IOMEM_ERR_PTR(-EINVAL);
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}
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size = resource_size(res);
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if (!devm_request_mem_region(dev, res->start, size, dev_name(dev))) {
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dev_err(dev, "can't request region for resource %pR\n", res);
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return IOMEM_ERR_PTR(-EBUSY);
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}
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dest_ptr = __devm_ioremap(dev, res->start, size, type);
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if (!dest_ptr) {
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dev_err(dev, "ioremap failed for resource %pR\n", res);
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devm_release_mem_region(dev, res->start, size);
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dest_ptr = IOMEM_ERR_PTR(-ENOMEM);
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}
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return dest_ptr;
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}
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/**
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* devm_ioremap_resource() - check, request region, and ioremap resource
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* @dev: generic device to handle the resource for
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* @res: resource to be handled
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*
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* Checks that a resource is a valid memory region, requests the memory
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* region and ioremaps it. All operations are managed and will be undone
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* on driver detach.
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*
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* Returns a pointer to the remapped memory or an ERR_PTR() encoded error code
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* on failure. Usage example:
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*
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* res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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* base = devm_ioremap_resource(&pdev->dev, res);
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* if (IS_ERR(base))
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* return PTR_ERR(base);
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*/
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void __iomem *devm_ioremap_resource(struct device *dev,
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const struct resource *res)
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{
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return __devm_ioremap_resource(dev, res, DEVM_IOREMAP);
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}
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EXPORT_SYMBOL(devm_ioremap_resource);
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/**
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* devm_ioremap_resource_wc() - write-combined variant of
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* devm_ioremap_resource()
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* @dev: generic device to handle the resource for
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* @res: resource to be handled
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*
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* Returns a pointer to the remapped memory or an ERR_PTR() encoded error code
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* on failure. Usage example:
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*/
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void __iomem *devm_ioremap_resource_wc(struct device *dev,
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const struct resource *res)
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{
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return __devm_ioremap_resource(dev, res, DEVM_IOREMAP_WC);
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}
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/*
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* devm_of_iomap - Requests a resource and maps the memory mapped IO
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* for a given device_node managed by a given device
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*
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* Checks that a resource is a valid memory region, requests the memory
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* region and ioremaps it. All operations are managed and will be undone
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* on driver detach of the device.
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*
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* This is to be used when a device requests/maps resources described
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* by other device tree nodes (children or otherwise).
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*
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* @dev: The device "managing" the resource
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* @node: The device-tree node where the resource resides
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* @index: index of the MMIO range in the "reg" property
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* @size: Returns the size of the resource (pass NULL if not needed)
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* Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded
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* error code on failure. Usage example:
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*
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* base = devm_of_iomap(&pdev->dev, node, 0, NULL);
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* if (IS_ERR(base))
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* return PTR_ERR(base);
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*/
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void __iomem *devm_of_iomap(struct device *dev, struct device_node *node, int index,
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resource_size_t *size)
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{
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struct resource res;
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if (of_address_to_resource(node, index, &res))
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return IOMEM_ERR_PTR(-EINVAL);
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if (size)
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*size = resource_size(&res);
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return devm_ioremap_resource(dev, &res);
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}
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EXPORT_SYMBOL(devm_of_iomap);
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#ifdef CONFIG_HAS_IOPORT_MAP
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/*
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* Generic iomap devres
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*/
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static void devm_ioport_map_release(struct device *dev, void *res)
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{
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ioport_unmap(*(void __iomem **)res);
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}
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static int devm_ioport_map_match(struct device *dev, void *res,
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void *match_data)
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{
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return *(void **)res == match_data;
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}
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/**
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* devm_ioport_map - Managed ioport_map()
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* @dev: Generic device to map ioport for
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* @port: Port to map
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* @nr: Number of ports to map
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*
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* Managed ioport_map(). Map is automatically unmapped on driver
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* detach.
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*/
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void __iomem *devm_ioport_map(struct device *dev, unsigned long port,
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unsigned int nr)
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{
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void __iomem **ptr, *addr;
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ptr = devres_alloc(devm_ioport_map_release, sizeof(*ptr), GFP_KERNEL);
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if (!ptr)
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return NULL;
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addr = ioport_map(port, nr);
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if (addr) {
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*ptr = addr;
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devres_add(dev, ptr);
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} else
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devres_free(ptr);
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return addr;
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}
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EXPORT_SYMBOL(devm_ioport_map);
|
|
|
|
/**
|
|
* devm_ioport_unmap - Managed ioport_unmap()
|
|
* @dev: Generic device to unmap for
|
|
* @addr: Address to unmap
|
|
*
|
|
* Managed ioport_unmap(). @addr must have been mapped using
|
|
* devm_ioport_map().
|
|
*/
|
|
void devm_ioport_unmap(struct device *dev, void __iomem *addr)
|
|
{
|
|
ioport_unmap(addr);
|
|
WARN_ON(devres_destroy(dev, devm_ioport_map_release,
|
|
devm_ioport_map_match, (__force void *)addr));
|
|
}
|
|
EXPORT_SYMBOL(devm_ioport_unmap);
|
|
#endif /* CONFIG_HAS_IOPORT_MAP */
|
|
|
|
#ifdef CONFIG_PCI
|
|
/*
|
|
* PCI iomap devres
|
|
*/
|
|
#define PCIM_IOMAP_MAX PCI_STD_NUM_BARS
|
|
|
|
struct pcim_iomap_devres {
|
|
void __iomem *table[PCIM_IOMAP_MAX];
|
|
};
|
|
|
|
static void pcim_iomap_release(struct device *gendev, void *res)
|
|
{
|
|
struct pci_dev *dev = to_pci_dev(gendev);
|
|
struct pcim_iomap_devres *this = res;
|
|
int i;
|
|
|
|
for (i = 0; i < PCIM_IOMAP_MAX; i++)
|
|
if (this->table[i])
|
|
pci_iounmap(dev, this->table[i]);
|
|
}
|
|
|
|
/**
|
|
* pcim_iomap_table - access iomap allocation table
|
|
* @pdev: PCI device to access iomap table for
|
|
*
|
|
* Access iomap allocation table for @dev. If iomap table doesn't
|
|
* exist and @pdev is managed, it will be allocated. All iomaps
|
|
* recorded in the iomap table are automatically unmapped on driver
|
|
* detach.
|
|
*
|
|
* This function might sleep when the table is first allocated but can
|
|
* be safely called without context and guaranteed to succed once
|
|
* allocated.
|
|
*/
|
|
void __iomem * const *pcim_iomap_table(struct pci_dev *pdev)
|
|
{
|
|
struct pcim_iomap_devres *dr, *new_dr;
|
|
|
|
dr = devres_find(&pdev->dev, pcim_iomap_release, NULL, NULL);
|
|
if (dr)
|
|
return dr->table;
|
|
|
|
new_dr = devres_alloc(pcim_iomap_release, sizeof(*new_dr), GFP_KERNEL);
|
|
if (!new_dr)
|
|
return NULL;
|
|
dr = devres_get(&pdev->dev, new_dr, NULL, NULL);
|
|
return dr->table;
|
|
}
|
|
EXPORT_SYMBOL(pcim_iomap_table);
|
|
|
|
/**
|
|
* pcim_iomap - Managed pcim_iomap()
|
|
* @pdev: PCI device to iomap for
|
|
* @bar: BAR to iomap
|
|
* @maxlen: Maximum length of iomap
|
|
*
|
|
* Managed pci_iomap(). Map is automatically unmapped on driver
|
|
* detach.
|
|
*/
|
|
void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen)
|
|
{
|
|
void __iomem **tbl;
|
|
|
|
BUG_ON(bar >= PCIM_IOMAP_MAX);
|
|
|
|
tbl = (void __iomem **)pcim_iomap_table(pdev);
|
|
if (!tbl || tbl[bar]) /* duplicate mappings not allowed */
|
|
return NULL;
|
|
|
|
tbl[bar] = pci_iomap(pdev, bar, maxlen);
|
|
return tbl[bar];
|
|
}
|
|
EXPORT_SYMBOL(pcim_iomap);
|
|
|
|
/**
|
|
* pcim_iounmap - Managed pci_iounmap()
|
|
* @pdev: PCI device to iounmap for
|
|
* @addr: Address to unmap
|
|
*
|
|
* Managed pci_iounmap(). @addr must have been mapped using pcim_iomap().
|
|
*/
|
|
void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr)
|
|
{
|
|
void __iomem **tbl;
|
|
int i;
|
|
|
|
pci_iounmap(pdev, addr);
|
|
|
|
tbl = (void __iomem **)pcim_iomap_table(pdev);
|
|
BUG_ON(!tbl);
|
|
|
|
for (i = 0; i < PCIM_IOMAP_MAX; i++)
|
|
if (tbl[i] == addr) {
|
|
tbl[i] = NULL;
|
|
return;
|
|
}
|
|
WARN_ON(1);
|
|
}
|
|
EXPORT_SYMBOL(pcim_iounmap);
|
|
|
|
/**
|
|
* pcim_iomap_regions - Request and iomap PCI BARs
|
|
* @pdev: PCI device to map IO resources for
|
|
* @mask: Mask of BARs to request and iomap
|
|
* @name: Name used when requesting regions
|
|
*
|
|
* Request and iomap regions specified by @mask.
|
|
*/
|
|
int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name)
|
|
{
|
|
void __iomem * const *iomap;
|
|
int i, rc;
|
|
|
|
iomap = pcim_iomap_table(pdev);
|
|
if (!iomap)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
|
|
unsigned long len;
|
|
|
|
if (!(mask & (1 << i)))
|
|
continue;
|
|
|
|
rc = -EINVAL;
|
|
len = pci_resource_len(pdev, i);
|
|
if (!len)
|
|
goto err_inval;
|
|
|
|
rc = pci_request_region(pdev, i, name);
|
|
if (rc)
|
|
goto err_inval;
|
|
|
|
rc = -ENOMEM;
|
|
if (!pcim_iomap(pdev, i, 0))
|
|
goto err_region;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_region:
|
|
pci_release_region(pdev, i);
|
|
err_inval:
|
|
while (--i >= 0) {
|
|
if (!(mask & (1 << i)))
|
|
continue;
|
|
pcim_iounmap(pdev, iomap[i]);
|
|
pci_release_region(pdev, i);
|
|
}
|
|
|
|
return rc;
|
|
}
|
|
EXPORT_SYMBOL(pcim_iomap_regions);
|
|
|
|
/**
|
|
* pcim_iomap_regions_request_all - Request all BARs and iomap specified ones
|
|
* @pdev: PCI device to map IO resources for
|
|
* @mask: Mask of BARs to iomap
|
|
* @name: Name used when requesting regions
|
|
*
|
|
* Request all PCI BARs and iomap regions specified by @mask.
|
|
*/
|
|
int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask,
|
|
const char *name)
|
|
{
|
|
int request_mask = ((1 << 6) - 1) & ~mask;
|
|
int rc;
|
|
|
|
rc = pci_request_selected_regions(pdev, request_mask, name);
|
|
if (rc)
|
|
return rc;
|
|
|
|
rc = pcim_iomap_regions(pdev, mask, name);
|
|
if (rc)
|
|
pci_release_selected_regions(pdev, request_mask);
|
|
return rc;
|
|
}
|
|
EXPORT_SYMBOL(pcim_iomap_regions_request_all);
|
|
|
|
/**
|
|
* pcim_iounmap_regions - Unmap and release PCI BARs
|
|
* @pdev: PCI device to map IO resources for
|
|
* @mask: Mask of BARs to unmap and release
|
|
*
|
|
* Unmap and release regions specified by @mask.
|
|
*/
|
|
void pcim_iounmap_regions(struct pci_dev *pdev, int mask)
|
|
{
|
|
void __iomem * const *iomap;
|
|
int i;
|
|
|
|
iomap = pcim_iomap_table(pdev);
|
|
if (!iomap)
|
|
return;
|
|
|
|
for (i = 0; i < PCIM_IOMAP_MAX; i++) {
|
|
if (!(mask & (1 << i)))
|
|
continue;
|
|
|
|
pcim_iounmap(pdev, iomap[i]);
|
|
pci_release_region(pdev, i);
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(pcim_iounmap_regions);
|
|
#endif /* CONFIG_PCI */
|