Kunihiko Hayashi 6f1aa4ef3f clk: uniphier: add additional ethernet clock lines for Pro4 ... Pro4 SoC has clock lines for Giga-bit feature and ethernet phy, and these are mandatory to activate the ethernet controller. This adds support for the clock lines. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2018-04-05 15:03:51 -07:00
..
clk-uniphier-core.c	clk: uniphier: add PXs3 clock data	2017-08-31 18:34:35 -07:00
clk-uniphier-cpugear.c	clk: uniphier: remove unneeded #include <linux/delay.h>	2017-01-09 16:27:28 -08:00
clk-uniphier-fixed-factor.c
clk-uniphier-fixed-rate.c
clk-uniphier-gate.c
clk-uniphier-mio.c	clk: uniphier: fix parent of miodmac clock data	2017-11-14 10:04:04 -08:00
clk-uniphier-mux.c	clk: uniphier: fix type of variable passed to regmap_read()	2016-10-17 15:20:52 -07:00
clk-uniphier-peri.c	clk: uniphier: add clock data for UniPhier SoCs	2016-09-16 16:31:38 -07:00
clk-uniphier-sys.c	clk: uniphier: add additional ethernet clock lines for Pro4	2018-04-05 15:03:51 -07:00
clk-uniphier.h	clk: uniphier: add PXs3 clock data	2017-08-31 18:34:35 -07:00
Kconfig
Makefile	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00