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1f2bb4acc1
We were using an atomic bitop on the vgic_v2.vgic_elrsr field which was not aligned to the natural size on 64-bit platforms. This bug showed up after QEMU correctly identifies the pl011 line as being level-triggered, and not edge-triggered. These data structures are protected by a spinlock so simply use a non-atomic version of the accessor instead. Tested-by: Joel Schopp <joel.schopp@amd.com> Reported-by: Riku Voipio <riku.voipio@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> |
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.. | ||
arm | ||
assigned-dev.c | ||
async_pf.c | ||
async_pf.h | ||
coalesced_mmio.c | ||
coalesced_mmio.h | ||
eventfd.c | ||
ioapic.c | ||
ioapic.h | ||
iodev.h | ||
iommu.c | ||
irq_comm.c | ||
irqchip.c | ||
Kconfig | ||
kvm_main.c | ||
vfio.c |