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fdec2a9ef8
Currently, the {read,write}_sysreg_el*() accessors for accessing
particular ELs' sysregs in the presence of VHE rely on some local
hacks and define their system register encodings in a way that is
inconsistent with the core definitions in <asm/sysreg.h>.
As a result, it is necessary to add duplicate definitions for any
system register that already needs a definition in sysreg.h for
other reasons.
This is a bit of a maintenance headache, and the reasons for the
_el*() accessors working the way they do is a bit historical.
This patch gets rid of the shadow sysreg definitions in
<asm/kvm_hyp.h>, converts the _el*() accessors to use the core
__msr_s/__mrs_s interface, and converts all call sites to use the
standard sysreg #define names (i.e., upper case, with SYS_ prefix).
This patch will conflict heavily anyway, so the opportunity
to clean up some bad whitespace in the context of the changes is
taken.
The change exposes a few system registers that have no sysreg.h
definition, due to msr_s/mrs_s being used in place of msr/mrs:
additions are made in order to fill in the gaps.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Christoffer Dall <christoffer.dall@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Link: https://www.spinics.net/lists/kvm-arm/msg31717.html
[Rebased to v4.21-rc1]
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
[Rebased to v5.2-rc5, changelog updates]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
127 lines
4.2 KiB
C
127 lines
4.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2015 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*/
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#ifndef __ARM64_KVM_HYP_H__
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#define __ARM64_KVM_HYP_H__
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#include <linux/compiler.h>
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#include <linux/kvm_host.h>
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#include <asm/alternative.h>
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#include <asm/kvm_mmu.h>
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#include <asm/sysreg.h>
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#define __hyp_text __section(.hyp.text) notrace
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#define read_sysreg_elx(r,nvh,vh) \
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({ \
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u64 reg; \
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asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh), \
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__mrs_s("%0", r##vh), \
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ARM64_HAS_VIRT_HOST_EXTN) \
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: "=r" (reg)); \
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reg; \
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})
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#define write_sysreg_elx(v,r,nvh,vh) \
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do { \
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u64 __val = (u64)(v); \
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asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"), \
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__msr_s(r##vh, "%x0"), \
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ARM64_HAS_VIRT_HOST_EXTN) \
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: : "rZ" (__val)); \
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} while (0)
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/*
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* Unified accessors for registers that have a different encoding
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* between VHE and non-VHE. They must be specified without their "ELx"
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* encoding, but with the SYS_ prefix, as defined in asm/sysreg.h.
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*/
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#define read_sysreg_el0(r) read_sysreg_elx(r, _EL0, _EL02)
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#define write_sysreg_el0(v,r) write_sysreg_elx(v, r, _EL0, _EL02)
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#define read_sysreg_el1(r) read_sysreg_elx(r, _EL1, _EL12)
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#define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12)
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#define read_sysreg_el2(r) read_sysreg_elx(r, _EL2, _EL1)
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#define write_sysreg_el2(v,r) write_sysreg_elx(v, r, _EL2, _EL1)
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/**
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* hyp_alternate_select - Generates patchable code sequences that are
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* used to switch between two implementations of a function, depending
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* on the availability of a feature.
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*
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* @fname: a symbol name that will be defined as a function returning a
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* function pointer whose type will match @orig and @alt
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* @orig: A pointer to the default function, as returned by @fname when
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* @cond doesn't hold
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* @alt: A pointer to the alternate function, as returned by @fname
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* when @cond holds
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* @cond: a CPU feature (as described in asm/cpufeature.h)
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*/
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#define hyp_alternate_select(fname, orig, alt, cond) \
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typeof(orig) * __hyp_text fname(void) \
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{ \
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typeof(alt) *val = orig; \
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asm volatile(ALTERNATIVE("nop \n", \
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"mov %0, %1 \n", \
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cond) \
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: "+r" (val) : "r" (alt)); \
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return val; \
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}
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int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu);
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void __vgic_v3_save_state(struct kvm_vcpu *vcpu);
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void __vgic_v3_restore_state(struct kvm_vcpu *vcpu);
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void __vgic_v3_activate_traps(struct kvm_vcpu *vcpu);
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void __vgic_v3_deactivate_traps(struct kvm_vcpu *vcpu);
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void __vgic_v3_save_aprs(struct kvm_vcpu *vcpu);
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void __vgic_v3_restore_aprs(struct kvm_vcpu *vcpu);
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int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu);
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void __timer_enable_traps(struct kvm_vcpu *vcpu);
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void __timer_disable_traps(struct kvm_vcpu *vcpu);
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void __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt);
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void __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt);
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void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt);
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void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt);
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void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt);
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void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt);
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void __sysreg32_save_state(struct kvm_vcpu *vcpu);
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void __sysreg32_restore_state(struct kvm_vcpu *vcpu);
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void __debug_switch_to_guest(struct kvm_vcpu *vcpu);
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void __debug_switch_to_host(struct kvm_vcpu *vcpu);
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void __fpsimd_save_state(struct user_fpsimd_state *fp_regs);
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void __fpsimd_restore_state(struct user_fpsimd_state *fp_regs);
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void activate_traps_vhe_load(struct kvm_vcpu *vcpu);
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void deactivate_traps_vhe_put(void);
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u64 __guest_enter(struct kvm_vcpu *vcpu, struct kvm_cpu_context *host_ctxt);
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void __noreturn __hyp_do_panic(unsigned long, ...);
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/*
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* Must be called from hyp code running at EL2 with an updated VTTBR
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* and interrupts disabled.
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*/
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static __always_inline void __hyp_text __load_guest_stage2(struct kvm *kvm)
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{
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write_sysreg(kvm->arch.vtcr, vtcr_el2);
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write_sysreg(kvm_get_vttbr(kvm), vttbr_el2);
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/*
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* ARM erratum 1165522 requires the actual execution of the above
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* before we can switch to the EL1/EL0 translation regime used by
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* the guest.
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*/
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asm(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_1165522));
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}
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#endif /* __ARM64_KVM_HYP_H__ */
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