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dfd437a257
- arm64 support for syscall emulation via PTRACE_SYSEMU{,_SINGLESTEP} - Wire up VM_FLUSH_RESET_PERMS for arm64, allowing the core code to manage the permissions of executable vmalloc regions more strictly - Slight performance improvement by keeping softirqs enabled while touching the FPSIMD/SVE state (kernel_neon_begin/end) - Expose a couple of ARMv8.5 features to user (HWCAP): CondM (new XAFLAG and AXFLAG instructions for floating point comparison flags manipulation) and FRINT (rounding floating point numbers to integers) - Re-instate ARM64_PSEUDO_NMI support which was previously marked as BROKEN due to some bugs (now fixed) - Improve parking of stopped CPUs and implement an arm64-specific panic_smp_self_stop() to avoid warning on not being able to stop secondary CPUs during panic - perf: enable the ARM Statistical Profiling Extensions (SPE) on ACPI platforms - perf: DDR performance monitor support for iMX8QXP - cache_line_size() can now be set from DT or ACPI/PPTT if provided to cope with a system cache info not exposed via the CPUID registers - Avoid warning on hardware cache line size greater than ARCH_DMA_MINALIGN if the system is fully coherent - arm64 do_page_fault() and hugetlb cleanups - Refactor set_pte_at() to avoid redundant READ_ONCE(*ptep) - Ignore ACPI 5.1 FADTs reported as 5.0 (infer from the 'arm_boot_flags' introduced in 5.1) - CONFIG_RANDOMIZE_BASE now enabled in defconfig - Allow the selection of ARM64_MODULE_PLTS, currently only done via RANDOMIZE_BASE (and an erratum workaround), allowing modules to spill over into the vmalloc area - Make ZONE_DMA32 configurable -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAl0eHqcACgkQa9axLQDI XvFyNA/+L+bnkz8m3ncydlqqfXomQn4eJJVQ8Uksb0knJz+1+3CUxxbO4ry4jXZN fMkbggYrDPRKpDbsUl0lsRipj7jW9bqan+N37c3SWqCkgb6HqDaHViwxdx6Ec/Uk gHudozDSPh/8c7hxGcSyt/CFyuW6b+8eYIQU5rtIgz8aVY2BypBvS/7YtYCbIkx0 w4CFleRTK1zXD5mJQhrc6jyDx659sVkrAvdhf6YIymOY8nBTv40vwdNo3beJMYp8 Po/+0Ixu+VkHUNtmYYZQgP/AGH96xiTcRnUqd172JdtRPpCLqnLqwFokXeVIlUKT KZFMDPzK+756Ayn4z4huEePPAOGlHbJje8JVNnFyreKhVVcCotW7YPY/oJR10bnc eo7yD+DxABTn+93G2yP436bNVa8qO1UqjOBfInWBtnNFJfANIkZweij/MQ6MjaTA o7KtviHnZFClefMPoiI7HDzwL8XSmsBDbeQ04s2Wxku1Y2xUHLx4iLmadwLQ1ZPb lZMTZP3N/T1554MoURVA1afCjAwiqU3bt1xDUGjbBVjLfSPBAn/25IacsG9Li9AF 7Rp1M9VhrfLftjFFkB2HwpbhRASOxaOSx+EI3kzEfCtM2O9I1WHgP3rvCdc3l0HU tbK0/IggQicNgz7GSZ8xDlWPwwSadXYGLys+xlMZEYd3pDIOiFc= =0TDT -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: - arm64 support for syscall emulation via PTRACE_SYSEMU{,_SINGLESTEP} - Wire up VM_FLUSH_RESET_PERMS for arm64, allowing the core code to manage the permissions of executable vmalloc regions more strictly - Slight performance improvement by keeping softirqs enabled while touching the FPSIMD/SVE state (kernel_neon_begin/end) - Expose a couple of ARMv8.5 features to user (HWCAP): CondM (new XAFLAG and AXFLAG instructions for floating point comparison flags manipulation) and FRINT (rounding floating point numbers to integers) - Re-instate ARM64_PSEUDO_NMI support which was previously marked as BROKEN due to some bugs (now fixed) - Improve parking of stopped CPUs and implement an arm64-specific panic_smp_self_stop() to avoid warning on not being able to stop secondary CPUs during panic - perf: enable the ARM Statistical Profiling Extensions (SPE) on ACPI platforms - perf: DDR performance monitor support for iMX8QXP - cache_line_size() can now be set from DT or ACPI/PPTT if provided to cope with a system cache info not exposed via the CPUID registers - Avoid warning on hardware cache line size greater than ARCH_DMA_MINALIGN if the system is fully coherent - arm64 do_page_fault() and hugetlb cleanups - Refactor set_pte_at() to avoid redundant READ_ONCE(*ptep) - Ignore ACPI 5.1 FADTs reported as 5.0 (infer from the 'arm_boot_flags' introduced in 5.1) - CONFIG_RANDOMIZE_BASE now enabled in defconfig - Allow the selection of ARM64_MODULE_PLTS, currently only done via RANDOMIZE_BASE (and an erratum workaround), allowing modules to spill over into the vmalloc area - Make ZONE_DMA32 configurable * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (54 commits) perf: arm_spe: Enable ACPI/Platform automatic module loading arm_pmu: acpi: spe: Add initial MADT/SPE probing ACPI/PPTT: Add function to return ACPI 6.3 Identical tokens ACPI/PPTT: Modify node flag detection to find last IDENTICAL x86/entry: Simplify _TIF_SYSCALL_EMU handling arm64: rename dump_instr as dump_kernel_instr arm64/mm: Drop [PTE|PMD]_TYPE_FAULT arm64: Implement panic_smp_self_stop() arm64: Improve parking of stopped CPUs arm64: Expose FRINT capabilities to userspace arm64: Expose ARMv8.5 CondM capability to userspace arm64: defconfig: enable CONFIG_RANDOMIZE_BASE arm64: ARM64_MODULES_PLTS must depend on MODULES arm64: bpf: do not allocate executable memory arm64/kprobes: set VM_FLUSH_RESET_PERMS on kprobe instruction pages arm64/mm: wire up CONFIG_ARCH_HAS_SET_DIRECT_MAP arm64: module: create module allocations without exec permissions arm64: Allow user selection of ARM64_MODULE_PLTS acpi/arm64: ignore 5.1 FADTs that are reported as 5.0 arm64: Allow selecting Pseudo-NMI again ...
113 lines
4.1 KiB
C
113 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_HWCAP_H
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#define __ASM_HWCAP_H
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#include <uapi/asm/hwcap.h>
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#include <asm/cpufeature.h>
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#define COMPAT_HWCAP_HALF (1 << 1)
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#define COMPAT_HWCAP_THUMB (1 << 2)
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#define COMPAT_HWCAP_FAST_MULT (1 << 4)
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#define COMPAT_HWCAP_VFP (1 << 6)
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#define COMPAT_HWCAP_EDSP (1 << 7)
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#define COMPAT_HWCAP_NEON (1 << 12)
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#define COMPAT_HWCAP_VFPv3 (1 << 13)
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#define COMPAT_HWCAP_TLS (1 << 15)
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#define COMPAT_HWCAP_VFPv4 (1 << 16)
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#define COMPAT_HWCAP_IDIVA (1 << 17)
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#define COMPAT_HWCAP_IDIVT (1 << 18)
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#define COMPAT_HWCAP_IDIV (COMPAT_HWCAP_IDIVA|COMPAT_HWCAP_IDIVT)
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#define COMPAT_HWCAP_LPAE (1 << 20)
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#define COMPAT_HWCAP_EVTSTRM (1 << 21)
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#define COMPAT_HWCAP2_AES (1 << 0)
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#define COMPAT_HWCAP2_PMULL (1 << 1)
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#define COMPAT_HWCAP2_SHA1 (1 << 2)
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#define COMPAT_HWCAP2_SHA2 (1 << 3)
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#define COMPAT_HWCAP2_CRC32 (1 << 4)
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#ifndef __ASSEMBLY__
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#include <linux/log2.h>
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/*
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* For userspace we represent hwcaps as a collection of HWCAP{,2}_x bitfields
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* as described in uapi/asm/hwcap.h. For the kernel we represent hwcaps as
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* natural numbers (in a single range of size MAX_CPU_FEATURES) defined here
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* with prefix KERNEL_HWCAP_ mapped to their HWCAP{,2}_x counterpart.
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*
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* Hwcaps should be set and tested within the kernel via the
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* cpu_{set,have}_named_feature(feature) where feature is the unique suffix
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* of KERNEL_HWCAP_{feature}.
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*/
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#define __khwcap_feature(x) const_ilog2(HWCAP_ ## x)
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#define KERNEL_HWCAP_FP __khwcap_feature(FP)
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#define KERNEL_HWCAP_ASIMD __khwcap_feature(ASIMD)
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#define KERNEL_HWCAP_EVTSTRM __khwcap_feature(EVTSTRM)
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#define KERNEL_HWCAP_AES __khwcap_feature(AES)
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#define KERNEL_HWCAP_PMULL __khwcap_feature(PMULL)
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#define KERNEL_HWCAP_SHA1 __khwcap_feature(SHA1)
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#define KERNEL_HWCAP_SHA2 __khwcap_feature(SHA2)
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#define KERNEL_HWCAP_CRC32 __khwcap_feature(CRC32)
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#define KERNEL_HWCAP_ATOMICS __khwcap_feature(ATOMICS)
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#define KERNEL_HWCAP_FPHP __khwcap_feature(FPHP)
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#define KERNEL_HWCAP_ASIMDHP __khwcap_feature(ASIMDHP)
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#define KERNEL_HWCAP_CPUID __khwcap_feature(CPUID)
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#define KERNEL_HWCAP_ASIMDRDM __khwcap_feature(ASIMDRDM)
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#define KERNEL_HWCAP_JSCVT __khwcap_feature(JSCVT)
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#define KERNEL_HWCAP_FCMA __khwcap_feature(FCMA)
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#define KERNEL_HWCAP_LRCPC __khwcap_feature(LRCPC)
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#define KERNEL_HWCAP_DCPOP __khwcap_feature(DCPOP)
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#define KERNEL_HWCAP_SHA3 __khwcap_feature(SHA3)
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#define KERNEL_HWCAP_SM3 __khwcap_feature(SM3)
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#define KERNEL_HWCAP_SM4 __khwcap_feature(SM4)
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#define KERNEL_HWCAP_ASIMDDP __khwcap_feature(ASIMDDP)
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#define KERNEL_HWCAP_SHA512 __khwcap_feature(SHA512)
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#define KERNEL_HWCAP_SVE __khwcap_feature(SVE)
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#define KERNEL_HWCAP_ASIMDFHM __khwcap_feature(ASIMDFHM)
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#define KERNEL_HWCAP_DIT __khwcap_feature(DIT)
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#define KERNEL_HWCAP_USCAT __khwcap_feature(USCAT)
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#define KERNEL_HWCAP_ILRCPC __khwcap_feature(ILRCPC)
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#define KERNEL_HWCAP_FLAGM __khwcap_feature(FLAGM)
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#define KERNEL_HWCAP_SSBS __khwcap_feature(SSBS)
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#define KERNEL_HWCAP_SB __khwcap_feature(SB)
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#define KERNEL_HWCAP_PACA __khwcap_feature(PACA)
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#define KERNEL_HWCAP_PACG __khwcap_feature(PACG)
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#define __khwcap2_feature(x) (const_ilog2(HWCAP2_ ## x) + 32)
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#define KERNEL_HWCAP_DCPODP __khwcap2_feature(DCPODP)
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#define KERNEL_HWCAP_SVE2 __khwcap2_feature(SVE2)
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#define KERNEL_HWCAP_SVEAES __khwcap2_feature(SVEAES)
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#define KERNEL_HWCAP_SVEPMULL __khwcap2_feature(SVEPMULL)
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#define KERNEL_HWCAP_SVEBITPERM __khwcap2_feature(SVEBITPERM)
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#define KERNEL_HWCAP_SVESHA3 __khwcap2_feature(SVESHA3)
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#define KERNEL_HWCAP_SVESM4 __khwcap2_feature(SVESM4)
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#define KERNEL_HWCAP_FLAGM2 __khwcap2_feature(FLAGM2)
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#define KERNEL_HWCAP_FRINT __khwcap2_feature(FRINT)
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/*
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* This yields a mask that user programs can use to figure out what
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* instruction set this cpu supports.
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*/
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#define ELF_HWCAP cpu_get_elf_hwcap()
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#define ELF_HWCAP2 cpu_get_elf_hwcap2()
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#ifdef CONFIG_COMPAT
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#define COMPAT_ELF_HWCAP (compat_elf_hwcap)
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#define COMPAT_ELF_HWCAP2 (compat_elf_hwcap2)
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extern unsigned int compat_elf_hwcap, compat_elf_hwcap2;
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#endif
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enum {
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CAP_HWCAP = 1,
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#ifdef CONFIG_COMPAT
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CAP_COMPAT_HWCAP,
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CAP_COMPAT_HWCAP2,
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#endif
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};
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#endif
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#endif
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