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Implement write routine for OCOTP controller found in i.MX6 SoC's. Furthermore add locking to the read function to prevent race conditions. The write routine code is based on the fsl_otp driver from Freescale. Signed-off-by: Richard Leitner <richard.leitner@skidata.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
28 lines
775 B
Plaintext
28 lines
775 B
Plaintext
Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
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This binding represents the on-chip eFuse OTP controller found on
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i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX and i.MX6UL SoCs.
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Required properties:
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- compatible: should be one of
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"fsl,imx6q-ocotp" (i.MX6Q/D/DL/S),
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"fsl,imx6sl-ocotp" (i.MX6SL), or
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"fsl,imx6sx-ocotp" (i.MX6SX),
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"fsl,imx6ul-ocotp" (i.MX6UL),
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"fsl,imx7d-ocotp" (i.MX7D/S),
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followed by "syscon".
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- reg: Should contain the register base and length.
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- clocks: Should contain a phandle pointing to the gated peripheral clock.
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Optional properties:
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- read-only: disable write access
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Example:
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ocotp: ocotp@021bc000 {
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compatible = "fsl,imx6q-ocotp", "syscon";
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reg = <0x021bc000 0x4000>;
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clocks = <&clks IMX6QDL_CLK_IIM>;
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read-only;
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};
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