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bf5144a612
The code in pci_irq.c prints diagnostic messages using different and inconsistent methods. The majority of them are printed with the help of the dev_*() familiy of logging functions, but ACPI_DEBUG_PRINT() and ACPI_DEBUG_PRINT_RAW() are still used in some places which requires the ACPICA debug to be enabled additionally which is a nuisance and one message is printed using the raw printk(). To consolidate the printing of messages in that code, convert all of the ACPI_DEBUG_PRINT() instances in it into dev_dbg(), which is consistent with the way the other messages are printed by it, replace the only ACPI_DEBUG_PRINT_RAW() instance with pr_debug() and make it use pr_warn() istead of printk(KERN_WARNING ). Also add a pr_fmt() definition to that file and drop the _COMPONENT and ACPI_MODULE_NAME() definitions that are not used any more after the above changes. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Hanjun Guo <guohanjun@huawei.com>
515 lines
13 KiB
C
515 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* pci_irq.c - ACPI PCI Interrupt Routing ($Revision: 11 $)
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*
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* Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
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* Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
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* Copyright (C) 2002 Dominik Brodowski <devel@brodo.de>
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* (c) Copyright 2008 Hewlett-Packard Development Company, L.P.
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* Bjorn Helgaas <bjorn.helgaas@hp.com>
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*/
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#define pr_fmt(fmt) "ACPI: PCI: " fmt
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#include <linux/dmi.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/spinlock.h>
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#include <linux/pm.h>
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#include <linux/pci.h>
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#include <linux/acpi.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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struct acpi_prt_entry {
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struct acpi_pci_id id;
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u8 pin;
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acpi_handle link;
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u32 index; /* GSI, or link _CRS index */
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};
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static inline char pin_name(int pin)
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{
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return 'A' + pin - 1;
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}
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/* --------------------------------------------------------------------------
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PCI IRQ Routing Table (PRT) Support
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-------------------------------------------------------------------------- */
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/* http://bugzilla.kernel.org/show_bug.cgi?id=4773 */
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static const struct dmi_system_id medion_md9580[] = {
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{
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.ident = "Medion MD9580-F laptop",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "MEDIONNB"),
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DMI_MATCH(DMI_PRODUCT_NAME, "A555"),
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},
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},
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{ }
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};
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/* http://bugzilla.kernel.org/show_bug.cgi?id=5044 */
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static const struct dmi_system_id dell_optiplex[] = {
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{
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.ident = "Dell Optiplex GX1",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
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DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex GX1 600S+"),
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},
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},
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{ }
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};
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/* http://bugzilla.kernel.org/show_bug.cgi?id=10138 */
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static const struct dmi_system_id hp_t5710[] = {
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{
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.ident = "HP t5710",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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DMI_MATCH(DMI_PRODUCT_NAME, "hp t5000 series"),
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DMI_MATCH(DMI_BOARD_NAME, "098Ch"),
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},
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},
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{ }
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};
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struct prt_quirk {
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const struct dmi_system_id *system;
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unsigned int segment;
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unsigned int bus;
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unsigned int device;
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unsigned char pin;
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const char *source; /* according to BIOS */
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const char *actual_source;
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};
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#define PCI_INTX_PIN(c) (c - 'A' + 1)
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/*
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* These systems have incorrect _PRT entries. The BIOS claims the PCI
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* interrupt at the listed segment/bus/device/pin is connected to the first
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* link device, but it is actually connected to the second.
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*/
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static const struct prt_quirk prt_quirks[] = {
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{ medion_md9580, 0, 0, 9, PCI_INTX_PIN('A'),
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"\\_SB_.PCI0.ISA_.LNKA",
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"\\_SB_.PCI0.ISA_.LNKB"},
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{ dell_optiplex, 0, 0, 0xd, PCI_INTX_PIN('A'),
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"\\_SB_.LNKB",
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"\\_SB_.LNKA"},
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{ hp_t5710, 0, 0, 1, PCI_INTX_PIN('A'),
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"\\_SB_.PCI0.LNK1",
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"\\_SB_.PCI0.LNK3"},
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};
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static void do_prt_fixups(struct acpi_prt_entry *entry,
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struct acpi_pci_routing_table *prt)
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{
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int i;
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const struct prt_quirk *quirk;
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for (i = 0; i < ARRAY_SIZE(prt_quirks); i++) {
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quirk = &prt_quirks[i];
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/* All current quirks involve link devices, not GSIs */
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if (dmi_check_system(quirk->system) &&
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entry->id.segment == quirk->segment &&
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entry->id.bus == quirk->bus &&
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entry->id.device == quirk->device &&
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entry->pin == quirk->pin &&
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!strcmp(prt->source, quirk->source) &&
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strlen(prt->source) >= strlen(quirk->actual_source)) {
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pr_warn("Firmware reports "
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"%04x:%02x:%02x PCI INT %c connected to %s; "
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"changing to %s\n",
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entry->id.segment, entry->id.bus,
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entry->id.device, pin_name(entry->pin),
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prt->source, quirk->actual_source);
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strcpy(prt->source, quirk->actual_source);
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}
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}
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}
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static int acpi_pci_irq_check_entry(acpi_handle handle, struct pci_dev *dev,
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int pin, struct acpi_pci_routing_table *prt,
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struct acpi_prt_entry **entry_ptr)
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{
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int segment = pci_domain_nr(dev->bus);
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int bus = dev->bus->number;
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int device = pci_ari_enabled(dev->bus) ? 0 : PCI_SLOT(dev->devfn);
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struct acpi_prt_entry *entry;
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if (((prt->address >> 16) & 0xffff) != device ||
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prt->pin + 1 != pin)
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return -ENODEV;
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entry = kzalloc(sizeof(struct acpi_prt_entry), GFP_KERNEL);
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if (!entry)
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return -ENOMEM;
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/*
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* Note that the _PRT uses 0=INTA, 1=INTB, etc, while PCI uses
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* 1=INTA, 2=INTB. We use the PCI encoding throughout, so convert
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* it here.
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*/
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entry->id.segment = segment;
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entry->id.bus = bus;
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entry->id.device = (prt->address >> 16) & 0xFFFF;
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entry->pin = prt->pin + 1;
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do_prt_fixups(entry, prt);
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entry->index = prt->source_index;
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/*
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* Type 1: Dynamic
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* ---------------
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* The 'source' field specifies the PCI interrupt link device used to
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* configure the IRQ assigned to this slot|dev|pin. The 'source_index'
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* indicates which resource descriptor in the resource template (of
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* the link device) this interrupt is allocated from.
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*
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* NOTE: Don't query the Link Device for IRQ information at this time
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* because Link Device enumeration may not have occurred yet
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* (e.g. exists somewhere 'below' this _PRT entry in the ACPI
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* namespace).
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*/
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if (prt->source[0])
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acpi_get_handle(handle, prt->source, &entry->link);
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/*
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* Type 2: Static
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* --------------
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* The 'source' field is NULL, and the 'source_index' field specifies
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* the IRQ value, which is hardwired to specific interrupt inputs on
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* the interrupt controller.
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*/
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pr_debug("%04x:%02x:%02x[%c] -> %s[%d]\n",
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entry->id.segment, entry->id.bus, entry->id.device,
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pin_name(entry->pin), prt->source, entry->index);
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*entry_ptr = entry;
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return 0;
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}
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static int acpi_pci_irq_find_prt_entry(struct pci_dev *dev,
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int pin, struct acpi_prt_entry **entry_ptr)
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{
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acpi_status status;
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struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
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struct acpi_pci_routing_table *entry;
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acpi_handle handle = NULL;
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if (dev->bus->bridge)
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handle = ACPI_HANDLE(dev->bus->bridge);
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if (!handle)
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return -ENODEV;
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/* 'handle' is the _PRT's parent (root bridge or PCI-PCI bridge) */
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status = acpi_get_irq_routing_table(handle, &buffer);
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if (ACPI_FAILURE(status)) {
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kfree(buffer.pointer);
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return -ENODEV;
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}
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entry = buffer.pointer;
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while (entry && (entry->length > 0)) {
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if (!acpi_pci_irq_check_entry(handle, dev, pin,
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entry, entry_ptr))
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break;
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entry = (struct acpi_pci_routing_table *)
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((unsigned long)entry + entry->length);
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}
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kfree(buffer.pointer);
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return 0;
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}
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/* --------------------------------------------------------------------------
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PCI Interrupt Routing Support
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-------------------------------------------------------------------------- */
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#ifdef CONFIG_X86_IO_APIC
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extern int noioapicquirk;
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extern int noioapicreroute;
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static int bridge_has_boot_interrupt_variant(struct pci_bus *bus)
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{
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struct pci_bus *bus_it;
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for (bus_it = bus ; bus_it ; bus_it = bus_it->parent) {
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if (!bus_it->self)
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return 0;
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if (bus_it->self->irq_reroute_variant)
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return bus_it->self->irq_reroute_variant;
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}
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return 0;
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}
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/*
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* Some chipsets (e.g. Intel 6700PXH) generate a legacy INTx when the IRQ
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* entry in the chipset's IO-APIC is masked (as, e.g. the RT kernel does
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* during interrupt handling). When this INTx generation cannot be disabled,
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* we reroute these interrupts to their legacy equivalent to get rid of
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* spurious interrupts.
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*/
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static int acpi_reroute_boot_interrupt(struct pci_dev *dev,
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struct acpi_prt_entry *entry)
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{
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if (noioapicquirk || noioapicreroute) {
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return 0;
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} else {
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switch (bridge_has_boot_interrupt_variant(dev->bus)) {
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case 0:
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/* no rerouting necessary */
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return 0;
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case INTEL_IRQ_REROUTE_VARIANT:
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/*
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* Remap according to INTx routing table in 6700PXH
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* specs, intel order number 302628-002, section
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* 2.15.2. Other chipsets (80332, ...) have the same
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* mapping and are handled here as well.
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*/
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dev_info(&dev->dev, "PCI IRQ %d -> rerouted to legacy "
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"IRQ %d\n", entry->index,
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(entry->index % 4) + 16);
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entry->index = (entry->index % 4) + 16;
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return 1;
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default:
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dev_warn(&dev->dev, "Cannot reroute IRQ %d to legacy "
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"IRQ: unknown mapping\n", entry->index);
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return -1;
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}
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}
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}
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#endif /* CONFIG_X86_IO_APIC */
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static struct acpi_prt_entry *acpi_pci_irq_lookup(struct pci_dev *dev, int pin)
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{
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struct acpi_prt_entry *entry = NULL;
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struct pci_dev *bridge;
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u8 bridge_pin, orig_pin = pin;
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int ret;
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ret = acpi_pci_irq_find_prt_entry(dev, pin, &entry);
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if (!ret && entry) {
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#ifdef CONFIG_X86_IO_APIC
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acpi_reroute_boot_interrupt(dev, entry);
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#endif /* CONFIG_X86_IO_APIC */
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dev_dbg(&dev->dev, "Found [%c] _PRT entry\n", pin_name(pin));
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return entry;
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}
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/*
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* Attempt to derive an IRQ for this device from a parent bridge's
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* PCI interrupt routing entry (eg. yenta bridge and add-in card bridge).
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*/
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bridge = dev->bus->self;
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while (bridge) {
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pin = pci_swizzle_interrupt_pin(dev, pin);
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if ((bridge->class >> 8) == PCI_CLASS_BRIDGE_CARDBUS) {
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/* PC card has the same IRQ as its cardbridge */
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bridge_pin = bridge->pin;
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if (!bridge_pin) {
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dev_dbg(&bridge->dev, "No interrupt pin configured\n");
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return NULL;
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}
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pin = bridge_pin;
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}
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ret = acpi_pci_irq_find_prt_entry(bridge, pin, &entry);
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if (!ret && entry) {
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dev_dbg(&dev->dev, "Derived GSI INT %c from %s\n",
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pin_name(orig_pin), pci_name(bridge));
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return entry;
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}
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dev = bridge;
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bridge = dev->bus->self;
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}
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dev_warn(&dev->dev, "can't derive routing for PCI INT %c\n",
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pin_name(orig_pin));
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return NULL;
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}
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#if IS_ENABLED(CONFIG_ISA) || IS_ENABLED(CONFIG_EISA)
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static int acpi_isa_register_gsi(struct pci_dev *dev)
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{
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u32 dev_gsi;
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/* Interrupt Line values above 0xF are forbidden */
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if (dev->irq > 0 && (dev->irq <= 0xF) &&
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acpi_isa_irq_available(dev->irq) &&
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(acpi_isa_irq_to_gsi(dev->irq, &dev_gsi) == 0)) {
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dev_warn(&dev->dev, "PCI INT %c: no GSI - using ISA IRQ %d\n",
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pin_name(dev->pin), dev->irq);
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acpi_register_gsi(&dev->dev, dev_gsi,
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ACPI_LEVEL_SENSITIVE,
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ACPI_ACTIVE_LOW);
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return 0;
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}
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return -EINVAL;
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}
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#else
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static inline int acpi_isa_register_gsi(struct pci_dev *dev)
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{
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return -ENODEV;
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}
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#endif
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static inline bool acpi_pci_irq_valid(struct pci_dev *dev, u8 pin)
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{
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#ifdef CONFIG_X86
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/*
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* On x86 irq line 0xff means "unknown" or "no connection"
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* (PCI 3.0, Section 6.2.4, footnote on page 223).
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*/
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if (dev->irq == 0xff) {
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dev->irq = IRQ_NOTCONNECTED;
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dev_warn(&dev->dev, "PCI INT %c: not connected\n",
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pin_name(pin));
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return false;
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}
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#endif
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return true;
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}
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int acpi_pci_irq_enable(struct pci_dev *dev)
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{
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struct acpi_prt_entry *entry;
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int gsi;
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u8 pin;
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int triggering = ACPI_LEVEL_SENSITIVE;
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/*
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* On ARM systems with the GIC interrupt model, level interrupts
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* are always polarity high by specification; PCI legacy
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* IRQs lines are inverted before reaching the interrupt
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* controller and must therefore be considered active high
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* as default.
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*/
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int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ?
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ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW;
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char *link = NULL;
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char link_desc[16];
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int rc;
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pin = dev->pin;
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if (!pin) {
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dev_dbg(&dev->dev, "No interrupt pin configured\n");
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return 0;
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}
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if (dev->irq_managed && dev->irq > 0)
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return 0;
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entry = acpi_pci_irq_lookup(dev, pin);
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if (!entry) {
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/*
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* IDE legacy mode controller IRQs are magic. Why do compat
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* extensions always make such a nasty mess.
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*/
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if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE &&
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(dev->class & 0x05) == 0)
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return 0;
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}
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if (entry) {
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if (entry->link)
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gsi = acpi_pci_link_allocate_irq(entry->link,
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entry->index,
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&triggering, &polarity,
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&link);
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else
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gsi = entry->index;
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} else
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gsi = -1;
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if (gsi < 0) {
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/*
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* No IRQ known to the ACPI subsystem - maybe the BIOS /
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* driver reported one, then use it. Exit in any case.
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*/
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if (!acpi_pci_irq_valid(dev, pin)) {
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kfree(entry);
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return 0;
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}
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if (acpi_isa_register_gsi(dev))
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dev_warn(&dev->dev, "PCI INT %c: no GSI\n",
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pin_name(pin));
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kfree(entry);
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return 0;
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}
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rc = acpi_register_gsi(&dev->dev, gsi, triggering, polarity);
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if (rc < 0) {
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dev_warn(&dev->dev, "PCI INT %c: failed to register GSI\n",
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pin_name(pin));
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kfree(entry);
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return rc;
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}
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dev->irq = rc;
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dev->irq_managed = 1;
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if (link)
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snprintf(link_desc, sizeof(link_desc), " -> Link[%s]", link);
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else
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link_desc[0] = '\0';
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dev_dbg(&dev->dev, "PCI INT %c%s -> GSI %u (%s, %s) -> IRQ %d\n",
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pin_name(pin), link_desc, gsi,
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(triggering == ACPI_LEVEL_SENSITIVE) ? "level" : "edge",
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(polarity == ACPI_ACTIVE_LOW) ? "low" : "high", dev->irq);
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kfree(entry);
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return 0;
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}
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void acpi_pci_irq_disable(struct pci_dev *dev)
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{
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struct acpi_prt_entry *entry;
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int gsi;
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u8 pin;
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pin = dev->pin;
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if (!pin || !dev->irq_managed || dev->irq <= 0)
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return;
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/* Keep IOAPIC pin configuration when suspending */
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if (dev->dev.power.is_prepared)
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return;
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|
#ifdef CONFIG_PM
|
|
if (dev->dev.power.runtime_status == RPM_SUSPENDING)
|
|
return;
|
|
#endif
|
|
|
|
entry = acpi_pci_irq_lookup(dev, pin);
|
|
if (!entry)
|
|
return;
|
|
|
|
if (entry->link)
|
|
gsi = acpi_pci_link_free_irq(entry->link);
|
|
else
|
|
gsi = entry->index;
|
|
|
|
kfree(entry);
|
|
|
|
/*
|
|
* TBD: It might be worth clearing dev->irq by magic constant
|
|
* (e.g. PCI_UNDEFINED_IRQ).
|
|
*/
|
|
|
|
dev_dbg(&dev->dev, "PCI INT %c disabled\n", pin_name(pin));
|
|
if (gsi >= 0) {
|
|
acpi_unregister_gsi(gsi);
|
|
dev->irq_managed = 0;
|
|
}
|
|
}
|