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1df372f473
The type 'enum kvm_reg_ex' is an extension of 'enum kvm_reg', however
the extension is only semantical and the compiler doesn't know about the
relationship between the two types. In kvm_pdptr_read() a value of the
extended type is passed to kvm_x86_ops->cache_reg(), which expects a
value of the base type. Clang raises the following warning about the
type mismatch:
arch/x86/kvm/kvm_cache_regs.h:44:32: warning: implicit conversion from
enumeration type 'enum kvm_reg_ex' to different enumeration type
'enum kvm_reg' [-Wenum-conversion]
kvm_x86_ops->cache_reg(vcpu, VCPU_EXREG_PDPTR);
Cast VCPU_EXREG_PDPTR to 'enum kvm_reg' to make the compiler happy.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
109 lines
2.8 KiB
C
109 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef ASM_KVM_CACHE_REGS_H
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#define ASM_KVM_CACHE_REGS_H
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#define KVM_POSSIBLE_CR0_GUEST_BITS X86_CR0_TS
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#define KVM_POSSIBLE_CR4_GUEST_BITS \
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(X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR \
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| X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_PGE)
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static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu,
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enum kvm_reg reg)
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{
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if (!test_bit(reg, (unsigned long *)&vcpu->arch.regs_avail))
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kvm_x86_ops->cache_reg(vcpu, reg);
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return vcpu->arch.regs[reg];
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}
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static inline void kvm_register_write(struct kvm_vcpu *vcpu,
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enum kvm_reg reg,
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unsigned long val)
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{
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vcpu->arch.regs[reg] = val;
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__set_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty);
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__set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail);
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}
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static inline unsigned long kvm_rip_read(struct kvm_vcpu *vcpu)
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{
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return kvm_register_read(vcpu, VCPU_REGS_RIP);
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}
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static inline void kvm_rip_write(struct kvm_vcpu *vcpu, unsigned long val)
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{
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kvm_register_write(vcpu, VCPU_REGS_RIP, val);
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}
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static inline u64 kvm_pdptr_read(struct kvm_vcpu *vcpu, int index)
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{
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might_sleep(); /* on svm */
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if (!test_bit(VCPU_EXREG_PDPTR,
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(unsigned long *)&vcpu->arch.regs_avail))
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kvm_x86_ops->cache_reg(vcpu, (enum kvm_reg)VCPU_EXREG_PDPTR);
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return vcpu->arch.walk_mmu->pdptrs[index];
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}
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static inline ulong kvm_read_cr0_bits(struct kvm_vcpu *vcpu, ulong mask)
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{
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ulong tmask = mask & KVM_POSSIBLE_CR0_GUEST_BITS;
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if (tmask & vcpu->arch.cr0_guest_owned_bits)
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kvm_x86_ops->decache_cr0_guest_bits(vcpu);
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return vcpu->arch.cr0 & mask;
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}
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static inline ulong kvm_read_cr0(struct kvm_vcpu *vcpu)
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{
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return kvm_read_cr0_bits(vcpu, ~0UL);
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}
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static inline ulong kvm_read_cr4_bits(struct kvm_vcpu *vcpu, ulong mask)
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{
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ulong tmask = mask & KVM_POSSIBLE_CR4_GUEST_BITS;
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if (tmask & vcpu->arch.cr4_guest_owned_bits)
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kvm_x86_ops->decache_cr4_guest_bits(vcpu);
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return vcpu->arch.cr4 & mask;
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}
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static inline ulong kvm_read_cr3(struct kvm_vcpu *vcpu)
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{
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if (!test_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail))
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kvm_x86_ops->decache_cr3(vcpu);
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return vcpu->arch.cr3;
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}
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static inline ulong kvm_read_cr4(struct kvm_vcpu *vcpu)
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{
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return kvm_read_cr4_bits(vcpu, ~0UL);
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}
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static inline u64 kvm_read_edx_eax(struct kvm_vcpu *vcpu)
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{
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return (kvm_register_read(vcpu, VCPU_REGS_RAX) & -1u)
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| ((u64)(kvm_register_read(vcpu, VCPU_REGS_RDX) & -1u) << 32);
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}
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static inline void enter_guest_mode(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.hflags |= HF_GUEST_MASK;
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}
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static inline void leave_guest_mode(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.hflags &= ~HF_GUEST_MASK;
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}
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static inline bool is_guest_mode(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.hflags & HF_GUEST_MASK;
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}
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static inline bool is_smm(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.hflags & HF_SMM_MASK;
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}
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#endif
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