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7dd0557819
This is the initial implementation adding only basic clocks like UART,
MMC, I2C and corresponding parent clocks. Design is influenced by
Exynos5433 clock driver.
Bus clock is enabled by default (in probe function) for all CMUs except
CMU_TOP, the reasoning is as follows. By default if bus clock has no
users its "enable count" value is 0. It might be actually running if
it's already enabled in bootloader, but then in some cases it can be
disabled by mistake. For example, such case was observed when
dw_mci_probe() enabled the bus clock, then failed to do something and
disabled that bus clock on error path. After that, even the attempt to
read the 'clk_summary' file in DebugFS freezed forever, as CMU bus clock
ended up being disabled and it wasn't possible to access CMU registers
anymore.
To avoid such cases, CMU driver must increment the ref count for that
bus clock by running clk_prepare_enable(). There is already existing
'.clk_name' field in struct samsung_cmu_info, exactly for that reason.
It was added in commit 523d3de41f ("clk: samsung: exynos5433: Add
support for runtime PM"), with next mentioning in commit message:
> Also for each CMU there is one special parent clock, which has to be
> enabled all the time when any access to CMU registers is being done.
But that clock is actually only enabled in Exynos5433 clock driver right
now. So the same code is added to exynos850_cmu_probe() function,
As was described above, it might be helpful not only for PM reasons, but
also to prevent possible erroneous clock gating on error paths.
Another way to workaround that issue would be to use CLOCK_IS_CRITICAL
flag for corresponding gate clocks. But that might be not very good
design decision, as we might still want to disable that bus clock, e.g.
on PM suspend.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211008154352.19519-6-semen.protsenko@linaro.org
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
27 lines
1.2 KiB
Makefile
27 lines
1.2 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Samsung Clock specific Makefile
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#
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obj-$(CONFIG_COMMON_CLK) += clk.o clk-pll.o clk-cpu.o
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obj-$(CONFIG_EXYNOS_3250_COMMON_CLK) += clk-exynos3250.o
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obj-$(CONFIG_EXYNOS_4_COMMON_CLK) += clk-exynos4.o
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obj-$(CONFIG_EXYNOS_4_COMMON_CLK) += clk-exynos4412-isp.o
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obj-$(CONFIG_EXYNOS_5250_COMMON_CLK) += clk-exynos5250.o
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obj-$(CONFIG_EXYNOS_5250_COMMON_CLK) += clk-exynos5-subcmu.o
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obj-$(CONFIG_EXYNOS_5260_COMMON_CLK) += clk-exynos5260.o
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obj-$(CONFIG_EXYNOS_5410_COMMON_CLK) += clk-exynos5410.o
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obj-$(CONFIG_EXYNOS_5420_COMMON_CLK) += clk-exynos5420.o
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obj-$(CONFIG_EXYNOS_5420_COMMON_CLK) += clk-exynos5-subcmu.o
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obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos5433.o
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obj-$(CONFIG_EXYNOS_AUDSS_CLK_CON) += clk-exynos-audss.o
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obj-$(CONFIG_EXYNOS_CLKOUT) += clk-exynos-clkout.o
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obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7.o
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obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos850.o
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obj-$(CONFIG_S3C2410_COMMON_CLK)+= clk-s3c2410.o
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obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o
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obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o
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obj-$(CONFIG_S3C2443_COMMON_CLK)+= clk-s3c2443.o
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obj-$(CONFIG_S3C64XX_COMMON_CLK) += clk-s3c64xx.o
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obj-$(CONFIG_S5PV210_COMMON_CLK) += clk-s5pv210.o clk-s5pv210-audss.o
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