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d279134168
We can support more cache attributes (e.g., CC, SUC and WUC) and page protection when we use TLB for ioremap(). The implementation is based on GENERIC_IOREMAP. The existing simple ioremap() implementation has better performance so we keep it and introduce ARCH_IOREMAP to control the selection. We move pagetable_init() earlier to make early ioremap() works, and we modify the PCI ecam mapping because the TLB-based version of ioremap() will actually take the size into account. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
29 lines
612 B
C
29 lines
612 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* fixmap.h: compile-time virtual memory allocation
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*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#ifndef _ASM_FIXMAP_H
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#define _ASM_FIXMAP_H
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#define NR_FIX_BTMAPS 64
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enum fixed_addresses {
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FIX_HOLE,
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FIX_EARLYCON_MEM_BASE,
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__end_of_fixed_addresses
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};
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#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
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#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
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#define FIXMAP_PAGE_IO PAGE_KERNEL_SUC
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extern void __set_fixmap(enum fixed_addresses idx,
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phys_addr_t phys, pgprot_t flags);
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#include <asm-generic/fixmap.h>
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#endif
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