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d595d423d0
Allow the boot_secondary SMP op to return an error to __cpu_up(), which will in turn return it to its caller. This will allow SMP implementations to return errors quickly in cases they they know have failed, rather than relying upon __cpu_up() eventually timing out waiting for the cpu_running completion. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17014/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
146 lines
3.3 KiB
C
146 lines
3.3 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2013 Cavium, Inc.
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*/
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#include <linux/interrupt.h>
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#include <linux/cpumask.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/sched/task_stack.h>
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#include <asm/mipsregs.h>
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#include <asm/setup.h>
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#include <asm/time.h>
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#include <asm/smp.h>
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/*
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* Writing the sp releases the CPU, so writes must be ordered, gp
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* first, then sp.
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*/
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unsigned long paravirt_smp_sp[NR_CPUS];
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unsigned long paravirt_smp_gp[NR_CPUS];
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static int numcpus = 1;
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static int __init set_numcpus(char *str)
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{
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int newval;
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if (get_option(&str, &newval)) {
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if (newval < 1 || newval >= NR_CPUS)
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goto bad;
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numcpus = newval;
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return 0;
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}
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bad:
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return -EINVAL;
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}
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early_param("numcpus", set_numcpus);
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static void paravirt_smp_setup(void)
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{
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int id;
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unsigned int cpunum = get_ebase_cpunum();
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if (WARN_ON(cpunum >= NR_CPUS))
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return;
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/* The present CPUs are initially just the boot cpu (CPU 0). */
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for (id = 0; id < NR_CPUS; id++) {
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set_cpu_possible(id, id == 0);
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set_cpu_present(id, id == 0);
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}
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__cpu_number_map[cpunum] = 0;
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__cpu_logical_map[0] = cpunum;
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for (id = 0; id < numcpus; id++) {
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set_cpu_possible(id, true);
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set_cpu_present(id, true);
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__cpu_number_map[id] = id;
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__cpu_logical_map[id] = id;
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}
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}
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void irq_mbox_ipi(int cpu, unsigned int actions);
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static void paravirt_send_ipi_single(int cpu, unsigned int action)
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{
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irq_mbox_ipi(cpu, action);
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}
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static void paravirt_send_ipi_mask(const struct cpumask *mask, unsigned int action)
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{
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unsigned int cpu;
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for_each_cpu(cpu, mask)
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paravirt_send_ipi_single(cpu, action);
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}
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static void paravirt_init_secondary(void)
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{
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unsigned int sr;
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sr = set_c0_status(ST0_BEV);
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write_c0_ebase((u32)ebase);
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sr |= STATUSF_IP2; /* Interrupt controller on IP2 */
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write_c0_status(sr);
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irq_cpu_online();
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}
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static void paravirt_smp_finish(void)
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{
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/* to generate the first CPU timer interrupt */
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write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);
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local_irq_enable();
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}
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static int paravirt_boot_secondary(int cpu, struct task_struct *idle)
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{
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paravirt_smp_gp[cpu] = (unsigned long)task_thread_info(idle);
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smp_wmb();
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paravirt_smp_sp[cpu] = __KSTK_TOS(idle);
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return 0;
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}
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static irqreturn_t paravirt_reched_interrupt(int irq, void *dev_id)
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{
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scheduler_ipi();
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return IRQ_HANDLED;
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}
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static irqreturn_t paravirt_function_interrupt(int irq, void *dev_id)
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{
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generic_smp_call_function_interrupt();
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return IRQ_HANDLED;
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}
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static void paravirt_prepare_cpus(unsigned int max_cpus)
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{
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if (request_irq(MIPS_IRQ_MBOX0, paravirt_reched_interrupt,
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IRQF_PERCPU | IRQF_NO_THREAD, "Scheduler",
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paravirt_reched_interrupt)) {
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panic("Cannot request_irq for SchedulerIPI");
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}
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if (request_irq(MIPS_IRQ_MBOX1, paravirt_function_interrupt,
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IRQF_PERCPU | IRQF_NO_THREAD, "SMP-Call",
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paravirt_function_interrupt)) {
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panic("Cannot request_irq for SMP-Call");
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}
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}
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const struct plat_smp_ops paravirt_smp_ops = {
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.send_ipi_single = paravirt_send_ipi_single,
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.send_ipi_mask = paravirt_send_ipi_mask,
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.init_secondary = paravirt_init_secondary,
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.smp_finish = paravirt_smp_finish,
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.boot_secondary = paravirt_boot_secondary,
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.smp_setup = paravirt_smp_setup,
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.prepare_cpus = paravirt_prepare_cpus,
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};
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