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8c26376112
Allocate a queue set per core, up to the maximum of available qsets. Share the queue sets on multi port adapters. Rename MSI-X interrupt vectors ethX-N, N being the queue set number. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
178 lines
3.8 KiB
C
178 lines
3.8 KiB
C
/*
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* Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef __CHIOCTL_H__
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#define __CHIOCTL_H__
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/*
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* Ioctl commands specific to this driver.
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*/
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enum {
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CHELSIO_GETMTUTAB = 1029,
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CHELSIO_SETMTUTAB = 1030,
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CHELSIO_SET_PM = 1032,
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CHELSIO_GET_PM = 1033,
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CHELSIO_GET_MEM = 1038,
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CHELSIO_LOAD_FW = 1041,
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CHELSIO_SET_TRACE_FILTER = 1044,
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CHELSIO_SET_QSET_PARAMS = 1045,
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CHELSIO_GET_QSET_PARAMS = 1046,
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CHELSIO_SET_QSET_NUM = 1047,
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CHELSIO_GET_QSET_NUM = 1048,
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};
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struct ch_reg {
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uint32_t cmd;
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uint32_t addr;
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uint32_t val;
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};
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struct ch_cntxt {
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uint32_t cmd;
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uint32_t cntxt_type;
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uint32_t cntxt_id;
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uint32_t data[4];
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};
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/* context types */
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enum { CNTXT_TYPE_EGRESS, CNTXT_TYPE_FL, CNTXT_TYPE_RSP, CNTXT_TYPE_CQ };
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struct ch_desc {
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uint32_t cmd;
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uint32_t queue_num;
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uint32_t idx;
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uint32_t size;
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uint8_t data[128];
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};
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struct ch_mem_range {
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uint32_t cmd;
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uint32_t mem_id;
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uint32_t addr;
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uint32_t len;
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uint32_t version;
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uint8_t buf[0];
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};
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struct ch_qset_params {
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uint32_t cmd;
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uint32_t qset_idx;
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int32_t txq_size[3];
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int32_t rspq_size;
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int32_t fl_size[2];
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int32_t intr_lat;
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int32_t polling;
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int32_t lro;
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int32_t cong_thres;
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int32_t vector;
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int32_t qnum;
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};
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struct ch_pktsched_params {
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uint32_t cmd;
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uint8_t sched;
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uint8_t idx;
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uint8_t min;
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uint8_t max;
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uint8_t binding;
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};
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#ifndef TCB_SIZE
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# define TCB_SIZE 128
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#endif
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/* TCB size in 32-bit words */
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#define TCB_WORDS (TCB_SIZE / 4)
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enum { MEM_CM, MEM_PMRX, MEM_PMTX }; /* ch_mem_range.mem_id values */
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struct ch_mtus {
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uint32_t cmd;
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uint32_t nmtus;
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uint16_t mtus[NMTUS];
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};
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struct ch_pm {
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uint32_t cmd;
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uint32_t tx_pg_sz;
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uint32_t tx_num_pg;
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uint32_t rx_pg_sz;
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uint32_t rx_num_pg;
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uint32_t pm_total;
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};
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struct ch_tcam {
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uint32_t cmd;
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uint32_t tcam_size;
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uint32_t nservers;
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uint32_t nroutes;
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uint32_t nfilters;
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};
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struct ch_tcb {
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uint32_t cmd;
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uint32_t tcb_index;
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uint32_t tcb_data[TCB_WORDS];
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};
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struct ch_tcam_word {
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uint32_t cmd;
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uint32_t addr;
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uint32_t buf[3];
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};
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struct ch_trace {
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uint32_t cmd;
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uint32_t sip;
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uint32_t sip_mask;
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uint32_t dip;
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uint32_t dip_mask;
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uint16_t sport;
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uint16_t sport_mask;
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uint16_t dport;
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uint16_t dport_mask;
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uint32_t vlan:12;
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uint32_t vlan_mask:12;
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uint32_t intf:4;
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uint32_t intf_mask:4;
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uint8_t proto;
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uint8_t proto_mask;
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uint8_t invert_match:1;
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uint8_t config_tx:1;
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uint8_t config_rx:1;
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uint8_t trace_tx:1;
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uint8_t trace_rx:1;
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};
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#define SIOCCHIOCTL SIOCDEVPRIVATE
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#endif
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