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334 lines
8.8 KiB
C
334 lines
8.8 KiB
C
#ifndef __SPARC_IO_H
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#define __SPARC_IO_H
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/ioport.h> /* struct resource */
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#include <asm/page.h> /* IO address mapping routines need this */
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#include <asm/system.h>
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#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
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static inline u32 flip_dword (u32 l)
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{
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return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff);
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}
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static inline u16 flip_word (u16 w)
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{
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return ((w&0xff) << 8) | ((w>>8)&0xff);
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}
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#define mmiowb()
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/*
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* Memory mapped I/O to PCI
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*/
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static inline u8 __raw_readb(const volatile void __iomem *addr)
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{
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return *(__force volatile u8 *)addr;
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}
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static inline u16 __raw_readw(const volatile void __iomem *addr)
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{
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return *(__force volatile u16 *)addr;
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}
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static inline u32 __raw_readl(const volatile void __iomem *addr)
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{
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return *(__force volatile u32 *)addr;
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}
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static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
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{
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*(__force volatile u8 *)addr = b;
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}
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static inline void __raw_writew(u16 w, volatile void __iomem *addr)
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{
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*(__force volatile u16 *)addr = w;
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}
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static inline void __raw_writel(u32 l, volatile void __iomem *addr)
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{
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*(__force volatile u32 *)addr = l;
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}
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static inline u8 __readb(const volatile void __iomem *addr)
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{
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return *(__force volatile u8 *)addr;
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}
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static inline u16 __readw(const volatile void __iomem *addr)
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{
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return flip_word(*(__force volatile u16 *)addr);
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}
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static inline u32 __readl(const volatile void __iomem *addr)
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{
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return flip_dword(*(__force volatile u32 *)addr);
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}
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static inline void __writeb(u8 b, volatile void __iomem *addr)
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{
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*(__force volatile u8 *)addr = b;
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}
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static inline void __writew(u16 w, volatile void __iomem *addr)
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{
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*(__force volatile u16 *)addr = flip_word(w);
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}
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static inline void __writel(u32 l, volatile void __iomem *addr)
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{
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*(__force volatile u32 *)addr = flip_dword(l);
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}
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#define readb(__addr) __readb(__addr)
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#define readw(__addr) __readw(__addr)
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#define readl(__addr) __readl(__addr)
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#define readb_relaxed(__addr) readb(__addr)
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#define readw_relaxed(__addr) readw(__addr)
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#define readl_relaxed(__addr) readl(__addr)
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#define writeb(__b, __addr) __writeb((__b),(__addr))
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#define writew(__w, __addr) __writew((__w),(__addr))
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#define writel(__l, __addr) __writel((__l),(__addr))
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/*
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* I/O space operations
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*
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* Arrangement on a Sun is somewhat complicated.
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*
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* First of all, we want to use standard Linux drivers
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* for keyboard, PC serial, etc. These drivers think
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* they access I/O space and use inb/outb.
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* On the other hand, EBus bridge accepts PCI *memory*
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* cycles and converts them into ISA *I/O* cycles.
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* Ergo, we want inb & outb to generate PCI memory cycles.
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*
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* If we want to issue PCI *I/O* cycles, we do this
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* with a low 64K fixed window in PCIC. This window gets
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* mapped somewhere into virtual kernel space and we
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* can use inb/outb again.
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*/
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#define inb_local(__addr) __readb((void __iomem *)(unsigned long)(__addr))
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#define inb(__addr) __readb((void __iomem *)(unsigned long)(__addr))
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#define inw(__addr) __readw((void __iomem *)(unsigned long)(__addr))
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#define inl(__addr) __readl((void __iomem *)(unsigned long)(__addr))
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#define outb_local(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr))
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#define outb(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr))
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#define outw(__w, __addr) __writew(__w, (void __iomem *)(unsigned long)(__addr))
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#define outl(__l, __addr) __writel(__l, (void __iomem *)(unsigned long)(__addr))
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#define inb_p(__addr) inb(__addr)
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#define outb_p(__b, __addr) outb(__b, __addr)
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#define inw_p(__addr) inw(__addr)
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#define outw_p(__w, __addr) outw(__w, __addr)
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#define inl_p(__addr) inl(__addr)
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#define outl_p(__l, __addr) outl(__l, __addr)
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void outsb(unsigned long addr, const void *src, unsigned long cnt);
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void outsw(unsigned long addr, const void *src, unsigned long cnt);
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void outsl(unsigned long addr, const void *src, unsigned long cnt);
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void insb(unsigned long addr, void *dst, unsigned long count);
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void insw(unsigned long addr, void *dst, unsigned long count);
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void insl(unsigned long addr, void *dst, unsigned long count);
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#define IO_SPACE_LIMIT 0xffffffff
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/*
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* SBus accessors.
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*
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* SBus has only one, memory mapped, I/O space.
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* We do not need to flip bytes for SBus of course.
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*/
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static inline u8 _sbus_readb(const volatile void __iomem *addr)
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{
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return *(__force volatile u8 *)addr;
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}
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static inline u16 _sbus_readw(const volatile void __iomem *addr)
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{
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return *(__force volatile u16 *)addr;
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}
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static inline u32 _sbus_readl(const volatile void __iomem *addr)
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{
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return *(__force volatile u32 *)addr;
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}
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static inline void _sbus_writeb(u8 b, volatile void __iomem *addr)
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{
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*(__force volatile u8 *)addr = b;
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}
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static inline void _sbus_writew(u16 w, volatile void __iomem *addr)
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{
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*(__force volatile u16 *)addr = w;
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}
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static inline void _sbus_writel(u32 l, volatile void __iomem *addr)
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{
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*(__force volatile u32 *)addr = l;
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}
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/*
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* The only reason for #define's is to hide casts to unsigned long.
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*/
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#define sbus_readb(__addr) _sbus_readb(__addr)
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#define sbus_readw(__addr) _sbus_readw(__addr)
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#define sbus_readl(__addr) _sbus_readl(__addr)
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#define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr)
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#define sbus_writew(__w, __addr) _sbus_writew(__w, __addr)
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#define sbus_writel(__l, __addr) _sbus_writel(__l, __addr)
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static inline void sbus_memset_io(volatile void __iomem *__dst, int c, __kernel_size_t n)
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{
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while(n--) {
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sbus_writeb(c, __dst);
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__dst++;
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}
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}
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static inline void
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_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
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{
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volatile void __iomem *d = dst;
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while (n--) {
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writeb(c, d);
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d++;
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}
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}
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#define memset_io(d,c,sz) _memset_io(d,c,sz)
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static inline void
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_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n)
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{
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char *d = dst;
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while (n--) {
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char tmp = readb(src);
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*d++ = tmp;
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src++;
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}
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}
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#define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz)
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static inline void
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_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n)
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{
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const char *s = src;
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volatile void __iomem *d = dst;
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while (n--) {
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char tmp = *s++;
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writeb(tmp, d);
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d++;
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}
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}
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#define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz)
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#ifdef __KERNEL__
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/*
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* Bus number may be embedded in the higher bits of the physical address.
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* This is why we have no bus number argument to ioremap().
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*/
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extern void __iomem *ioremap(unsigned long offset, unsigned long size);
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#define ioremap_nocache(X,Y) ioremap((X),(Y))
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#define ioremap_wc(X,Y) ioremap((X),(Y))
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extern void iounmap(volatile void __iomem *addr);
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#define ioread8(X) readb(X)
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#define ioread16(X) readw(X)
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#define ioread16be(X) __raw_readw(X)
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#define ioread32(X) readl(X)
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#define ioread32be(X) __raw_readl(X)
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#define iowrite8(val,X) writeb(val,X)
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#define iowrite16(val,X) writew(val,X)
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#define iowrite16be(val,X) __raw_writew(val,X)
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#define iowrite32(val,X) writel(val,X)
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#define iowrite32be(val,X) __raw_writel(val,X)
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static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
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{
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insb((unsigned long __force)port, buf, count);
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}
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static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
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{
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insw((unsigned long __force)port, buf, count);
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}
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static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
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{
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insl((unsigned long __force)port, buf, count);
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}
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static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
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{
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outsb((unsigned long __force)port, buf, count);
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}
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static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
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{
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outsw((unsigned long __force)port, buf, count);
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}
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static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
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{
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outsl((unsigned long __force)port, buf, count);
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}
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/* Create a virtual mapping cookie for an IO port range */
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extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
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extern void ioport_unmap(void __iomem *);
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/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
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struct pci_dev;
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extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
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extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
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/*
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* At the moment, we do not use CMOS_READ anywhere outside of rtc.c,
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* so rtc_port is static in it. This should not change unless a new
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* hardware pops up.
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*/
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#define RTC_PORT(x) (rtc_port + (x))
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#define RTC_ALWAYS_BCD 0
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static inline int sbus_can_dma_64bit(void)
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{
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return 0; /* actually, sparc_cpu_model==sun4d */
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}
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static inline int sbus_can_burst64(void)
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{
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return 0; /* actually, sparc_cpu_model==sun4d */
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}
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struct device;
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extern void sbus_set_sbus64(struct device *, int);
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#endif
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#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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* access
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*/
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#define xlate_dev_mem_ptr(p) __va(p)
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/*
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* Convert a virtual cached pointer to an uncached pointer
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*/
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#define xlate_dev_kmem_ptr(p) p
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#endif /* !(__SPARC_IO_H) */
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