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- BSC9132 is an integrated device that targets Femto base station market.
It combines Power Architecture e500v2 and DSP StarCore SC3850 technologies
with MAPLE-B2F baseband acceleration processing elements
- BSC9132QDS Overview
2Gbyte DDR3 (on board DDR)
32Mbyte 16bit NOR flash
128Mbyte 2K page size NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
SD slot
eTSEC1: Connected to SGMII PHY
eTSEC2: Connected to SGMII PHY
DUART interface: supports one UARTs up to 115200 bps for console display
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
87 lines
2.2 KiB
Plaintext
87 lines
2.2 KiB
Plaintext
Freescale Reference Board Bindings
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This document describes device tree bindings for various devices that
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exist on some Freescale reference boards.
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* Board Control and Status (BCSR)
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Required properties:
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- compatible : Should be "fsl,<board>-bcsr"
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- reg : Offset and length of the register set for the device
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Example:
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bcsr@f8000000 {
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compatible = "fsl,mpc8360mds-bcsr";
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reg = <f8000000 8000>;
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};
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* Freescale on-board FPGA
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This is the memory-mapped registers for on board FPGA.
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Required properities:
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- compatible: should be a board-specific string followed by a string
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indicating the type of FPGA. Example:
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"fsl,<board>-fpga", "fsl,fpga-pixis"
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- reg: should contain the address and the length of the FPGA register set.
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- interrupt-parent: should specify phandle for the interrupt controller.
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- interrupts: should specify event (wakeup) IRQ.
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Example (P1022DS):
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board-control@3,0 {
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compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
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reg = <3 0 0x30>;
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interrupt-parent = <&mpic>;
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interrupts = <8 8 0 0>;
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};
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* Freescale BCSR GPIO banks
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Some BCSR registers act as simple GPIO controllers, each such
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register can be represented by the gpio-controller node.
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Required properities:
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- compatible : Should be "fsl,<board>-bcsr-gpio".
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- reg : Should contain the address and the length of the GPIO bank
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register.
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- #gpio-cells : Should be two. The first cell is the pin number and the
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second cell is used to specify optional parameters (currently unused).
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- gpio-controller : Marks the port as GPIO controller.
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Example:
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bcsr@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8360mds-bcsr";
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reg = <1 0 0x8000>;
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ranges = <0 1 0 0x8000>;
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bcsr13: gpio-controller@d {
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#gpio-cells = <2>;
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compatible = "fsl,mpc8360mds-bcsr-gpio";
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reg = <0xd 1>;
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gpio-controller;
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};
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};
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* Freescale on-board FPGA connected on I2C bus
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Some Freescale boards like BSC9132QDS have on board FPGA connected on
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the i2c bus.
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Required properties:
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- compatible: Should be a board-specific string followed by a string
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indicating the type of FPGA. Example:
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"fsl,<board>-fpga", "fsl,fpga-qixis-i2c"
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- reg: Should contain the address of the FPGA
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Example:
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fpga: fpga@66 {
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compatible = "fsl,bsc9132qds-fpga", "fsl,fpga-qixis-i2c";
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reg = <0x66>;
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};
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