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e42aeef123
This reverts the following patches:d55dbd06bb
drm/i915: Allow nonblocking update of pageflips.15c86bdb76
drm/i915: Check for unpin correctness.95c2ccdc82
Reapply "drm/i915: Avoid stalling on pending flips for legacy cursor updates"a6747b7304
drm/i915: Make unpin async.03f476e1fc
drm/i915: Prepare connectors for nonblocking checks.2099deffef
drm/i915: Pass atomic states to fbc update functions.ee7171af72
drm/i915: Remove reset_counter from intel_crtc.2ee004f7c5
drm/i915: Remove queue_flip pointer.b8d2afae55
drm/i915: Remove use_mmio_flip kernel parameter.8dd634d922
drm/i915: Remove cs based page flip support.143f73b3bf
drm/i915: Rework intel_crtc_page_flip to be almost atomic, v3.84fc494b64
drm/i915: Add the exclusive fence to plane_state.6885843ae1
drm/i915: Convert flip_work to a list.aa420ddd8e
drm/i915: Allow mmio updates on all platforms, v2.afee4d8707
Revert "drm/i915: Avoid stalling on pending flips for legacy cursor updates" "drm/i915: Allow nonblocking update of pageflips" should have been split up, misses a proper commit message and seems to cause issues in the legacy page_flip path as demonstrated by kms_flip. "drm/i915: Make unpin async" doesn't handle the unthrottled cursor updates correctly, leading to an apparent pin count leak. This is caught by the WARN_ON in i915_gem_object_do_pin which screams if we have more than DRM_I915_GEM_OBJECT_MAX_PIN_COUNT pins. Unfortuantely we can't just revert these two because this patch series came with a built-in bisect breakage in the form of temporarily removing the unthrottled cursor update hack for legacy cursor ioctl. Therefore there's no other option than to revert the entire pile :( There's one tiny conflict in intel_drv.h due to other patches, nothing serious. Normally I'd wait a bit longer with doing a maintainer revert, but since the minimal set of patches we need to revert (due to the bisect breakage) is so big, time is running out fast. And very soon (especially after a few attempts at fixing issues) it'll be really hard to revert things cleanly. Lessons learned: - Not a good idea to rush the review (done by someone fairly new to the area) and not make sure domain experts had a chance to read it. - Patches should be properly split up. I only looked at the two patches that should be reverted in detail, but both look like the mix up different things in one patch. - Patches really should have proper commit messages. Especially when doing more than one thing, and especially when touching critical and tricky core code. - Building a patch series and r-b stamping it when it has a built-in bisect breakage is not a good idea. - I also think we need to stop building up technical debt by postponing atomic igt testcases even longer. I think it's clear that there's enough corner cases in this beast that we really need to have the testcases _before_ the next step lands. (cherry picked from commit5a21b6650a
from drm-intel-next-queeud) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Patrik Jakobsson <patrik.jakobsson@linux.intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Dave Airlie <airlied@redhat.com> Acked-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
256 lines
7.7 KiB
C
256 lines
7.7 KiB
C
/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/**
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* DOC: atomic plane helpers
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*
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* The functions here are used by the atomic plane helper functions to
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* implement legacy plane updates (i.e., drm_plane->update_plane() and
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* drm_plane->disable_plane()). This allows plane updates to use the
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* atomic state infrastructure and perform plane updates as separate
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* prepare/check/commit/cleanup steps.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_plane_helper.h>
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#include "intel_drv.h"
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/**
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* intel_create_plane_state - create plane state object
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* @plane: drm plane
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*
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* Allocates a fresh plane state for the given plane and sets some of
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* the state values to sensible initial values.
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*
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* Returns: A newly allocated plane state, or NULL on failure
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*/
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struct intel_plane_state *
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intel_create_plane_state(struct drm_plane *plane)
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{
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struct intel_plane_state *state;
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state = kzalloc(sizeof(*state), GFP_KERNEL);
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if (!state)
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return NULL;
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state->base.plane = plane;
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state->base.rotation = BIT(DRM_ROTATE_0);
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state->ckey.flags = I915_SET_COLORKEY_NONE;
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return state;
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}
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/**
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* intel_plane_duplicate_state - duplicate plane state
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* @plane: drm plane
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*
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* Allocates and returns a copy of the plane state (both common and
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* Intel-specific) for the specified plane.
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*
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* Returns: The newly allocated plane state, or NULL on failure.
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*/
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struct drm_plane_state *
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intel_plane_duplicate_state(struct drm_plane *plane)
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{
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struct drm_plane_state *state;
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struct intel_plane_state *intel_state;
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intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL);
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if (!intel_state)
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return NULL;
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state = &intel_state->base;
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__drm_atomic_helper_plane_duplicate_state(plane, state);
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intel_state->wait_req = NULL;
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return state;
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}
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/**
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* intel_plane_destroy_state - destroy plane state
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* @plane: drm plane
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* @state: state object to destroy
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*
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* Destroys the plane state (both common and Intel-specific) for the
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* specified plane.
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*/
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void
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intel_plane_destroy_state(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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WARN_ON(state && to_intel_plane_state(state)->wait_req);
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drm_atomic_helper_plane_destroy_state(plane, state);
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}
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static int intel_plane_atomic_check(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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struct drm_crtc *crtc = state->crtc;
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struct intel_crtc *intel_crtc;
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struct intel_crtc_state *crtc_state;
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struct intel_plane *intel_plane = to_intel_plane(plane);
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struct intel_plane_state *intel_state = to_intel_plane_state(state);
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struct drm_crtc_state *drm_crtc_state;
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int ret;
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crtc = crtc ? crtc : plane->state->crtc;
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intel_crtc = to_intel_crtc(crtc);
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/*
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* Both crtc and plane->crtc could be NULL if we're updating a
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* property while the plane is disabled. We don't actually have
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* anything driver-specific we need to test in that case, so
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* just return success.
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*/
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if (!crtc)
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return 0;
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drm_crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc);
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if (WARN_ON(!drm_crtc_state))
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return -EINVAL;
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crtc_state = to_intel_crtc_state(drm_crtc_state);
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/*
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* The original src/dest coordinates are stored in state->base, but
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* we want to keep another copy internal to our driver that we can
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* clip/modify ourselves.
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*/
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intel_state->src.x1 = state->src_x;
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intel_state->src.y1 = state->src_y;
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intel_state->src.x2 = state->src_x + state->src_w;
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intel_state->src.y2 = state->src_y + state->src_h;
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intel_state->dst.x1 = state->crtc_x;
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intel_state->dst.y1 = state->crtc_y;
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intel_state->dst.x2 = state->crtc_x + state->crtc_w;
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intel_state->dst.y2 = state->crtc_y + state->crtc_h;
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/* Clip all planes to CRTC size, or 0x0 if CRTC is disabled */
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intel_state->clip.x1 = 0;
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intel_state->clip.y1 = 0;
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intel_state->clip.x2 =
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crtc_state->base.enable ? crtc_state->pipe_src_w : 0;
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intel_state->clip.y2 =
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crtc_state->base.enable ? crtc_state->pipe_src_h : 0;
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if (state->fb && intel_rotation_90_or_270(state->rotation)) {
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if (!(state->fb->modifier[0] == I915_FORMAT_MOD_Y_TILED ||
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state->fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED)) {
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DRM_DEBUG_KMS("Y/Yf tiling required for 90/270!\n");
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return -EINVAL;
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}
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/*
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* 90/270 is not allowed with RGB64 16:16:16:16,
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* RGB 16-bit 5:6:5, and Indexed 8-bit.
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* TBD: Add RGB64 case once its added in supported format list.
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*/
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switch (state->fb->pixel_format) {
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case DRM_FORMAT_C8:
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case DRM_FORMAT_RGB565:
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DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n",
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drm_get_format_name(state->fb->pixel_format));
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return -EINVAL;
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default:
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break;
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}
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}
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intel_state->visible = false;
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ret = intel_plane->check_plane(plane, crtc_state, intel_state);
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if (ret)
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return ret;
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return intel_plane_atomic_calc_changes(&crtc_state->base, state);
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}
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static void intel_plane_atomic_update(struct drm_plane *plane,
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struct drm_plane_state *old_state)
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{
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struct intel_plane *intel_plane = to_intel_plane(plane);
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struct intel_plane_state *intel_state =
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to_intel_plane_state(plane->state);
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struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc;
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if (intel_state->visible)
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intel_plane->update_plane(plane,
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to_intel_crtc_state(crtc->state),
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intel_state);
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else
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intel_plane->disable_plane(plane, crtc);
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}
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const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
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.prepare_fb = intel_prepare_plane_fb,
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.cleanup_fb = intel_cleanup_plane_fb,
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.atomic_check = intel_plane_atomic_check,
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.atomic_update = intel_plane_atomic_update,
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};
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/**
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* intel_plane_atomic_get_property - fetch plane property value
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* @plane: plane to fetch property for
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* @state: state containing the property value
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* @property: property to look up
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* @val: pointer to write property value into
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*
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* The DRM core does not store shadow copies of properties for
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* atomic-capable drivers. This entrypoint is used to fetch
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* the current value of a driver-specific plane property.
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*/
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int
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intel_plane_atomic_get_property(struct drm_plane *plane,
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const struct drm_plane_state *state,
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struct drm_property *property,
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uint64_t *val)
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{
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DRM_DEBUG_KMS("Unknown plane property '%s'\n", property->name);
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return -EINVAL;
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}
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/**
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* intel_plane_atomic_set_property - set plane property value
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* @plane: plane to set property for
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* @state: state to update property value in
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* @property: property to set
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* @val: value to set property to
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*
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* Writes the specified property value for a plane into the provided atomic
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* state object.
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*
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* Returns 0 on success, -EINVAL on unrecognized properties
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*/
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int
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intel_plane_atomic_set_property(struct drm_plane *plane,
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struct drm_plane_state *state,
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struct drm_property *property,
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uint64_t val)
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{
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DRM_DEBUG_KMS("Unknown plane property '%s'\n", property->name);
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return -EINVAL;
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}
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