linux/arch/x86/kernel/cpu/mcheck
Xie XiuQi 1b48465500 x86/mce: Reenable CMCI banks when swiching back to interrupt mode
Zhang Liguang reported the following issue:

1) System detects a CMCI storm on the current CPU.

2) Kernel disables the CMCI interrupt on banks owned by the
   current CPU and switches to poll mode

3) After the CMCI storm subsides, kernel switches back to
   interrupt mode

4) We expect the system to reenable the CMCI interrupt on banks
   owned by the current CPU

   mce_intel_adjust_timer
   |-> cmci_reenable
       |-> cmci_discover     # owned banks are ignored here

  static void cmci_discover(int banks)
	...
	for (i = 0; i < banks; i++) {
		...
		if (test_bit(i, owned))	# ownd banks is ignore here
			continue;

So convert cmci_storm_disable_banks() to
cmci_toggle_interrupt_mode() which controls whether to enable or
disable CMCI interrupts with its argument.

NB: We cannot clear the owned bit because the banks won't be
polled, otherwise. See:

  27f6c573e0 ("x86, CMCI: Add proper detection of end of CMCI storms")

for more info.

Reported-by: Zhang Liguang <zhangliguang@huawei.com>
Signed-off-by: Xie XiuQi <xiexiuqi@huawei.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: <stable@vger.kernel.org> # v3.15+
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: huawei.libin@huawei.com
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: rui.xiang@huawei.com
Link: http://lkml.kernel.org/r/1439396985-12812-10-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-08-13 10:12:52 +02:00
..
Makefile x86/mce: Provide a lockless memory pool to save error records 2015-08-13 10:12:50 +02:00
mce_amd.c x86/mce/amd: Zap changelog 2015-05-07 12:06:43 +02:00
mce_intel.c x86/mce: Reenable CMCI banks when swiching back to interrupt mode 2015-08-13 10:12:52 +02:00
mce-apei.c x86/mce: Avoid potential deadlock due to printk() in MCE context 2015-08-13 10:12:51 +02:00
mce-genpool.c x86/mce: Provide a lockless memory pool to save error records 2015-08-13 10:12:50 +02:00
mce-inject.c x86: Replace __get_cpu_var uses 2014-08-26 13:45:49 -04:00
mce-internal.h x86/mce: Provide a lockless memory pool to save error records 2015-08-13 10:12:50 +02:00
mce-severity.c x86/mce/severity: Fix warning about indented braces 2015-04-03 15:20:38 +02:00
mce.c x86/mce: Clear Local MCE opt-in before kexec 2015-08-13 10:12:52 +02:00
p5.c x86: Clean up cr4 manipulation 2015-02-04 12:10:41 +01:00
therm_throt.c x86/mce: Avoid showing repetitive message from intel_init_thermal() 2014-09-19 12:56:05 +02:00
threshold.c asmlinkage, x86: Add explicit __visible to arch/x86/* 2014-05-05 16:07:44 -07:00
winchip.c x86: Clean up cr4 manipulation 2015-02-04 12:10:41 +01:00