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1a60667fc8
Currently both the oscillator and the PLL are powered up in set_bias_level. This can be problematic when using output clocks from the wm8804 for other devices. The snd_soc_codec_set_pll API defines that a clock should be available once the call returns, however, with all the clocking controlled in set_bias_level this is not currently the case. This patch enables pm_runtime for the wm8804, enabling both the regulators and the oscillator when the chip resumes, and enabling the PLL in the snd_soc_codec_set_pll call. Naturally the enabling the PLL will also cause the chip to resume. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@kernel.org> |
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.. | ||
aoa | ||
arm | ||
atmel | ||
core | ||
drivers | ||
firewire | ||
i2c | ||
isa | ||
mips | ||
oss | ||
parisc | ||
pci | ||
pcmcia | ||
ppc | ||
sh | ||
soc | ||
sparc | ||
spi | ||
synth | ||
usb | ||
ac97_bus.c | ||
Kconfig | ||
last.c | ||
Makefile | ||
sound_core.c | ||
sound_firmware.c |