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Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
322 lines
8.3 KiB
C
322 lines
8.3 KiB
C
/*
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* QNAP TS-409 Board Setup
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*
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* Maintainer: Sylver Bruneau <sylver.bruneau@gmail.com>
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*
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* Copyright (C) 2008 Sylver Bruneau <sylver.bruneau@gmail.com>
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* Copyright (C) 2008 Martin Michlmayr <tbm@cyrius.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <linux/irq.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/leds.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/i2c.h>
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#include <linux/serial_reg.h>
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#include <asm/mach-types.h>
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#include <asm/gpio.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/pci.h>
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#include <mach/orion5x.h>
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#include "common.h"
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#include "mpp.h"
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#include "tsx09-common.h"
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/*****************************************************************************
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* QNAP TS-409 Info
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****************************************************************************/
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/*
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* QNAP TS-409 hardware :
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* - Marvell 88F5281-D0
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* - Marvell 88SX7042 SATA controller (PCIe)
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* - Marvell 88E1118 Gigabit Ethernet PHY
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* - RTC S35390A (@0x30) on I2C bus
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* - 8MB NOR flash
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* - 256MB of DDR-2 RAM
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*/
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/*
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* 8MB NOR flash Device bus boot chip select
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*/
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#define QNAP_TS409_NOR_BOOT_BASE 0xff800000
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#define QNAP_TS409_NOR_BOOT_SIZE SZ_8M
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/****************************************************************************
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* 8MiB NOR flash. The struct mtd_partition is not in the same order as the
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* partitions on the device because we want to keep compatibility with
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* existing QNAP firmware.
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*
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* Layout as used by QNAP:
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* [2] 0x00000000-0x00200000 : "Kernel"
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* [3] 0x00200000-0x00600000 : "RootFS1"
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* [4] 0x00600000-0x00700000 : "RootFS2"
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* [6] 0x00700000-0x00760000 : "NAS Config" (read-only)
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* [5] 0x00760000-0x00780000 : "U-Boot Config"
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* [1] 0x00780000-0x00800000 : "U-Boot" (read-only)
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***************************************************************************/
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static struct mtd_partition qnap_ts409_partitions[] = {
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{
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.name = "U-Boot",
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.size = 0x00080000,
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.offset = 0x00780000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "Kernel",
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.size = 0x00200000,
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.offset = 0,
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}, {
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.name = "RootFS1",
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.size = 0x00400000,
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.offset = 0x00200000,
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}, {
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.name = "RootFS2",
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.size = 0x00100000,
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.offset = 0x00600000,
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}, {
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.name = "U-Boot Config",
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.size = 0x00020000,
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.offset = 0x00760000,
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}, {
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.name = "NAS Config",
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.size = 0x00060000,
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.offset = 0x00700000,
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.mask_flags = MTD_WRITEABLE,
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},
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};
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static struct physmap_flash_data qnap_ts409_nor_flash_data = {
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.width = 1,
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.parts = qnap_ts409_partitions,
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.nr_parts = ARRAY_SIZE(qnap_ts409_partitions)
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};
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static struct resource qnap_ts409_nor_flash_resource = {
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.flags = IORESOURCE_MEM,
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.start = QNAP_TS409_NOR_BOOT_BASE,
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.end = QNAP_TS409_NOR_BOOT_BASE + QNAP_TS409_NOR_BOOT_SIZE - 1,
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};
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static struct platform_device qnap_ts409_nor_flash = {
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.name = "physmap-flash",
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.id = 0,
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.dev = { .platform_data = &qnap_ts409_nor_flash_data, },
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.num_resources = 1,
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.resource = &qnap_ts409_nor_flash_resource,
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};
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/*****************************************************************************
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* PCI
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****************************************************************************/
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static int __init qnap_ts409_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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int irq;
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/*
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* Check for devices with hard-wired IRQs.
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*/
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irq = orion5x_pci_map_irq(dev, slot, pin);
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if (irq != -1)
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return irq;
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/*
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* PCI isn't used on the TS-409
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*/
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return -1;
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}
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static struct hw_pci qnap_ts409_pci __initdata = {
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.nr_controllers = 2,
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.swizzle = pci_std_swizzle,
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.setup = orion5x_pci_sys_setup,
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.scan = orion5x_pci_sys_scan_bus,
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.map_irq = qnap_ts409_pci_map_irq,
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};
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static int __init qnap_ts409_pci_init(void)
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{
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if (machine_is_ts409())
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pci_common_init(&qnap_ts409_pci);
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return 0;
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}
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subsys_initcall(qnap_ts409_pci_init);
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/*****************************************************************************
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* RTC S35390A on I2C bus
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****************************************************************************/
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#define TS409_RTC_GPIO 10
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static struct i2c_board_info __initdata qnap_ts409_i2c_rtc = {
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I2C_BOARD_INFO("s35390a", 0x30),
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};
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/*****************************************************************************
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* LEDs attached to GPIO
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****************************************************************************/
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static struct gpio_led ts409_led_pins[] = {
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{
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.name = "ts409:red:sata1",
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.gpio = 4,
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.active_low = 1,
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}, {
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.name = "ts409:red:sata2",
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.gpio = 5,
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.active_low = 1,
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}, {
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.name = "ts409:red:sata3",
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.gpio = 6,
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.active_low = 1,
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}, {
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.name = "ts409:red:sata4",
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.gpio = 7,
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.active_low = 1,
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},
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};
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static struct gpio_led_platform_data ts409_led_data = {
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.leds = ts409_led_pins,
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.num_leds = ARRAY_SIZE(ts409_led_pins),
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};
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static struct platform_device ts409_leds = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &ts409_led_data,
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},
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};
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/****************************************************************************
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* GPIO Attached Keys
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* Power button is attached to the PIC microcontroller
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****************************************************************************/
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#define QNAP_TS409_GPIO_KEY_RESET 14
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#define QNAP_TS409_GPIO_KEY_MEDIA 15
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static struct gpio_keys_button qnap_ts409_buttons[] = {
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{
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.code = KEY_RESTART,
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.gpio = QNAP_TS409_GPIO_KEY_RESET,
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.desc = "Reset Button",
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.active_low = 1,
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}, {
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.code = KEY_COPY,
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.gpio = QNAP_TS409_GPIO_KEY_MEDIA,
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.desc = "USB Copy Button",
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.active_low = 1,
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},
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};
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static struct gpio_keys_platform_data qnap_ts409_button_data = {
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.buttons = qnap_ts409_buttons,
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.nbuttons = ARRAY_SIZE(qnap_ts409_buttons),
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};
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static struct platform_device qnap_ts409_button_device = {
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.name = "gpio-keys",
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.id = -1,
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.num_resources = 0,
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.dev = {
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.platform_data = &qnap_ts409_button_data,
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},
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};
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/*****************************************************************************
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* General Setup
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****************************************************************************/
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static struct orion5x_mpp_mode ts409_mpp_modes[] __initdata = {
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{ 0, MPP_UNUSED },
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{ 1, MPP_UNUSED },
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{ 2, MPP_UNUSED },
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{ 3, MPP_UNUSED },
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{ 4, MPP_GPIO }, /* HDD 1 status */
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{ 5, MPP_GPIO }, /* HDD 2 status */
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{ 6, MPP_GPIO }, /* HDD 3 status */
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{ 7, MPP_GPIO }, /* HDD 4 status */
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{ 8, MPP_UNUSED },
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{ 9, MPP_UNUSED },
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{ 10, MPP_GPIO }, /* RTC int */
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{ 11, MPP_UNUSED },
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{ 12, MPP_UNUSED },
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{ 13, MPP_UNUSED },
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{ 14, MPP_GPIO }, /* SW_RST */
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{ 15, MPP_GPIO }, /* USB copy button */
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{ 16, MPP_UART }, /* UART1 RXD */
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{ 17, MPP_UART }, /* UART1 TXD */
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{ 18, MPP_UNUSED },
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{ 19, MPP_UNUSED },
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{ -1 },
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};
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static void __init qnap_ts409_init(void)
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{
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/*
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* Setup basic Orion functions. Need to be called early.
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*/
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orion5x_init();
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orion5x_mpp_conf(ts409_mpp_modes);
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/*
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* Configure peripherals.
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*/
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orion5x_setup_dev_boot_win(QNAP_TS409_NOR_BOOT_BASE,
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QNAP_TS409_NOR_BOOT_SIZE);
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platform_device_register(&qnap_ts409_nor_flash);
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orion5x_ehci0_init();
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qnap_tsx09_find_mac_addr(QNAP_TS409_NOR_BOOT_BASE +
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qnap_ts409_partitions[5].offset,
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qnap_ts409_partitions[5].size);
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orion5x_eth_init(&qnap_tsx09_eth_data);
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orion5x_i2c_init();
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orion5x_uart0_init();
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orion5x_uart1_init();
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platform_device_register(&qnap_ts409_button_device);
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/* Get RTC IRQ and register the chip */
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if (gpio_request(TS409_RTC_GPIO, "rtc") == 0) {
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if (gpio_direction_input(TS409_RTC_GPIO) == 0)
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qnap_ts409_i2c_rtc.irq = gpio_to_irq(TS409_RTC_GPIO);
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else
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gpio_free(TS409_RTC_GPIO);
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}
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if (qnap_ts409_i2c_rtc.irq == 0)
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pr_warning("qnap_ts409_init: failed to get RTC IRQ\n");
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i2c_register_board_info(0, &qnap_ts409_i2c_rtc, 1);
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platform_device_register(&ts409_leds);
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/* register tsx09 specific power-off method */
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pm_power_off = qnap_tsx09_power_off;
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}
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MACHINE_START(TS409, "QNAP TS-409")
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/* Maintainer: Sylver Bruneau <sylver.bruneau@gmail.com> */
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.boot_params = 0x00000100,
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.init_machine = qnap_ts409_init,
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.map_io = orion5x_map_io,
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.init_early = orion5x_init_early,
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.init_irq = orion5x_init_irq,
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.timer = &orion5x_timer,
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.fixup = tag_fixup_mem32,
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MACHINE_END
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