mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-05 01:54:09 +08:00
9611c18777
Fix typo in copyright notice. Signed-off-by: Nicolas Kaiser <nikai@nikai.net> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
474 lines
12 KiB
C
474 lines
12 KiB
C
/*
|
|
* irq_comm.c: Common API for in kernel interrupt controller
|
|
* Copyright (c) 2007, Intel Corporation.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms and conditions of the GNU General Public License,
|
|
* version 2, as published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
* more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License along with
|
|
* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
|
|
* Place - Suite 330, Boston, MA 02111-1307 USA.
|
|
* Authors:
|
|
* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
|
|
*
|
|
* Copyright 2010 Red Hat, Inc. and/or its affiliates.
|
|
*/
|
|
|
|
#include <linux/kvm_host.h>
|
|
#include <linux/slab.h>
|
|
#include <trace/events/kvm.h>
|
|
|
|
#include <asm/msidef.h>
|
|
#ifdef CONFIG_IA64
|
|
#include <asm/iosapic.h>
|
|
#endif
|
|
|
|
#include "irq.h"
|
|
|
|
#include "ioapic.h"
|
|
|
|
static inline int kvm_irq_line_state(unsigned long *irq_state,
|
|
int irq_source_id, int level)
|
|
{
|
|
/* Logical OR for level trig interrupt */
|
|
if (level)
|
|
set_bit(irq_source_id, irq_state);
|
|
else
|
|
clear_bit(irq_source_id, irq_state);
|
|
|
|
return !!(*irq_state);
|
|
}
|
|
|
|
static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
|
|
struct kvm *kvm, int irq_source_id, int level)
|
|
{
|
|
#ifdef CONFIG_X86
|
|
struct kvm_pic *pic = pic_irqchip(kvm);
|
|
level = kvm_irq_line_state(&pic->irq_states[e->irqchip.pin],
|
|
irq_source_id, level);
|
|
return kvm_pic_set_irq(pic, e->irqchip.pin, level);
|
|
#else
|
|
return -1;
|
|
#endif
|
|
}
|
|
|
|
static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
|
|
struct kvm *kvm, int irq_source_id, int level)
|
|
{
|
|
struct kvm_ioapic *ioapic = kvm->arch.vioapic;
|
|
level = kvm_irq_line_state(&ioapic->irq_states[e->irqchip.pin],
|
|
irq_source_id, level);
|
|
|
|
return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, level);
|
|
}
|
|
|
|
inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
|
|
{
|
|
#ifdef CONFIG_IA64
|
|
return irq->delivery_mode ==
|
|
(IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
|
|
#else
|
|
return irq->delivery_mode == APIC_DM_LOWEST;
|
|
#endif
|
|
}
|
|
|
|
int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
|
|
struct kvm_lapic_irq *irq)
|
|
{
|
|
int i, r = -1;
|
|
struct kvm_vcpu *vcpu, *lowest = NULL;
|
|
|
|
if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
|
|
kvm_is_dm_lowest_prio(irq))
|
|
printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
|
|
|
|
kvm_for_each_vcpu(i, vcpu, kvm) {
|
|
if (!kvm_apic_present(vcpu))
|
|
continue;
|
|
|
|
if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
|
|
irq->dest_id, irq->dest_mode))
|
|
continue;
|
|
|
|
if (!kvm_is_dm_lowest_prio(irq)) {
|
|
if (r < 0)
|
|
r = 0;
|
|
r += kvm_apic_set_irq(vcpu, irq);
|
|
} else if (kvm_lapic_enabled(vcpu)) {
|
|
if (!lowest)
|
|
lowest = vcpu;
|
|
else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
|
|
lowest = vcpu;
|
|
}
|
|
}
|
|
|
|
if (lowest)
|
|
r = kvm_apic_set_irq(lowest, irq);
|
|
|
|
return r;
|
|
}
|
|
|
|
static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
|
|
struct kvm *kvm, int irq_source_id, int level)
|
|
{
|
|
struct kvm_lapic_irq irq;
|
|
|
|
if (!level)
|
|
return -1;
|
|
|
|
trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
|
|
|
|
irq.dest_id = (e->msi.address_lo &
|
|
MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
|
|
irq.vector = (e->msi.data &
|
|
MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
|
|
irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
|
|
irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
|
|
irq.delivery_mode = e->msi.data & 0x700;
|
|
irq.level = 1;
|
|
irq.shorthand = 0;
|
|
|
|
/* TODO Deal with RH bit of MSI message address */
|
|
return kvm_irq_delivery_to_apic(kvm, NULL, &irq);
|
|
}
|
|
|
|
/*
|
|
* Return value:
|
|
* < 0 Interrupt was ignored (masked or not delivered for other reasons)
|
|
* = 0 Interrupt was coalesced (previous irq is still pending)
|
|
* > 0 Number of CPUs interrupt was delivered to
|
|
*/
|
|
int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level)
|
|
{
|
|
struct kvm_kernel_irq_routing_entry *e, irq_set[KVM_NR_IRQCHIPS];
|
|
int ret = -1, i = 0;
|
|
struct kvm_irq_routing_table *irq_rt;
|
|
struct hlist_node *n;
|
|
|
|
trace_kvm_set_irq(irq, level, irq_source_id);
|
|
|
|
/* Not possible to detect if the guest uses the PIC or the
|
|
* IOAPIC. So set the bit in both. The guest will ignore
|
|
* writes to the unused one.
|
|
*/
|
|
rcu_read_lock();
|
|
irq_rt = rcu_dereference(kvm->irq_routing);
|
|
if (irq < irq_rt->nr_rt_entries)
|
|
hlist_for_each_entry(e, n, &irq_rt->map[irq], link)
|
|
irq_set[i++] = *e;
|
|
rcu_read_unlock();
|
|
|
|
while(i--) {
|
|
int r;
|
|
r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level);
|
|
if (r < 0)
|
|
continue;
|
|
|
|
ret = r + ((ret < 0) ? 0 : ret);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
|
|
{
|
|
struct kvm_irq_ack_notifier *kian;
|
|
struct hlist_node *n;
|
|
int gsi;
|
|
|
|
trace_kvm_ack_irq(irqchip, pin);
|
|
|
|
rcu_read_lock();
|
|
gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
|
|
if (gsi != -1)
|
|
hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list,
|
|
link)
|
|
if (kian->gsi == gsi)
|
|
kian->irq_acked(kian);
|
|
rcu_read_unlock();
|
|
}
|
|
|
|
void kvm_register_irq_ack_notifier(struct kvm *kvm,
|
|
struct kvm_irq_ack_notifier *kian)
|
|
{
|
|
mutex_lock(&kvm->irq_lock);
|
|
hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list);
|
|
mutex_unlock(&kvm->irq_lock);
|
|
}
|
|
|
|
void kvm_unregister_irq_ack_notifier(struct kvm *kvm,
|
|
struct kvm_irq_ack_notifier *kian)
|
|
{
|
|
mutex_lock(&kvm->irq_lock);
|
|
hlist_del_init_rcu(&kian->link);
|
|
mutex_unlock(&kvm->irq_lock);
|
|
synchronize_rcu();
|
|
}
|
|
|
|
int kvm_request_irq_source_id(struct kvm *kvm)
|
|
{
|
|
unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
|
|
int irq_source_id;
|
|
|
|
mutex_lock(&kvm->irq_lock);
|
|
irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
|
|
|
|
if (irq_source_id >= BITS_PER_LONG) {
|
|
printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
|
|
irq_source_id = -EFAULT;
|
|
goto unlock;
|
|
}
|
|
|
|
ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
|
|
set_bit(irq_source_id, bitmap);
|
|
unlock:
|
|
mutex_unlock(&kvm->irq_lock);
|
|
|
|
return irq_source_id;
|
|
}
|
|
|
|
void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
|
|
{
|
|
int i;
|
|
|
|
ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
|
|
|
|
mutex_lock(&kvm->irq_lock);
|
|
if (irq_source_id < 0 ||
|
|
irq_source_id >= BITS_PER_LONG) {
|
|
printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
|
|
goto unlock;
|
|
}
|
|
clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
|
|
if (!irqchip_in_kernel(kvm))
|
|
goto unlock;
|
|
|
|
for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) {
|
|
clear_bit(irq_source_id, &kvm->arch.vioapic->irq_states[i]);
|
|
if (i >= 16)
|
|
continue;
|
|
#ifdef CONFIG_X86
|
|
clear_bit(irq_source_id, &pic_irqchip(kvm)->irq_states[i]);
|
|
#endif
|
|
}
|
|
unlock:
|
|
mutex_unlock(&kvm->irq_lock);
|
|
}
|
|
|
|
void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
|
|
struct kvm_irq_mask_notifier *kimn)
|
|
{
|
|
mutex_lock(&kvm->irq_lock);
|
|
kimn->irq = irq;
|
|
hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
|
|
mutex_unlock(&kvm->irq_lock);
|
|
}
|
|
|
|
void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
|
|
struct kvm_irq_mask_notifier *kimn)
|
|
{
|
|
mutex_lock(&kvm->irq_lock);
|
|
hlist_del_rcu(&kimn->link);
|
|
mutex_unlock(&kvm->irq_lock);
|
|
synchronize_rcu();
|
|
}
|
|
|
|
void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
|
|
bool mask)
|
|
{
|
|
struct kvm_irq_mask_notifier *kimn;
|
|
struct hlist_node *n;
|
|
int gsi;
|
|
|
|
rcu_read_lock();
|
|
gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
|
|
if (gsi != -1)
|
|
hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link)
|
|
if (kimn->irq == gsi)
|
|
kimn->func(kimn, mask);
|
|
rcu_read_unlock();
|
|
}
|
|
|
|
void kvm_free_irq_routing(struct kvm *kvm)
|
|
{
|
|
/* Called only during vm destruction. Nobody can use the pointer
|
|
at this stage */
|
|
kfree(kvm->irq_routing);
|
|
}
|
|
|
|
static int setup_routing_entry(struct kvm_irq_routing_table *rt,
|
|
struct kvm_kernel_irq_routing_entry *e,
|
|
const struct kvm_irq_routing_entry *ue)
|
|
{
|
|
int r = -EINVAL;
|
|
int delta;
|
|
unsigned max_pin;
|
|
struct kvm_kernel_irq_routing_entry *ei;
|
|
struct hlist_node *n;
|
|
|
|
/*
|
|
* Do not allow GSI to be mapped to the same irqchip more than once.
|
|
* Allow only one to one mapping between GSI and MSI.
|
|
*/
|
|
hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link)
|
|
if (ei->type == KVM_IRQ_ROUTING_MSI ||
|
|
ue->u.irqchip.irqchip == ei->irqchip.irqchip)
|
|
return r;
|
|
|
|
e->gsi = ue->gsi;
|
|
e->type = ue->type;
|
|
switch (ue->type) {
|
|
case KVM_IRQ_ROUTING_IRQCHIP:
|
|
delta = 0;
|
|
switch (ue->u.irqchip.irqchip) {
|
|
case KVM_IRQCHIP_PIC_MASTER:
|
|
e->set = kvm_set_pic_irq;
|
|
max_pin = 16;
|
|
break;
|
|
case KVM_IRQCHIP_PIC_SLAVE:
|
|
e->set = kvm_set_pic_irq;
|
|
max_pin = 16;
|
|
delta = 8;
|
|
break;
|
|
case KVM_IRQCHIP_IOAPIC:
|
|
max_pin = KVM_IOAPIC_NUM_PINS;
|
|
e->set = kvm_set_ioapic_irq;
|
|
break;
|
|
default:
|
|
goto out;
|
|
}
|
|
e->irqchip.irqchip = ue->u.irqchip.irqchip;
|
|
e->irqchip.pin = ue->u.irqchip.pin + delta;
|
|
if (e->irqchip.pin >= max_pin)
|
|
goto out;
|
|
rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi;
|
|
break;
|
|
case KVM_IRQ_ROUTING_MSI:
|
|
e->set = kvm_set_msi;
|
|
e->msi.address_lo = ue->u.msi.address_lo;
|
|
e->msi.address_hi = ue->u.msi.address_hi;
|
|
e->msi.data = ue->u.msi.data;
|
|
break;
|
|
default:
|
|
goto out;
|
|
}
|
|
|
|
hlist_add_head(&e->link, &rt->map[e->gsi]);
|
|
r = 0;
|
|
out:
|
|
return r;
|
|
}
|
|
|
|
|
|
int kvm_set_irq_routing(struct kvm *kvm,
|
|
const struct kvm_irq_routing_entry *ue,
|
|
unsigned nr,
|
|
unsigned flags)
|
|
{
|
|
struct kvm_irq_routing_table *new, *old;
|
|
u32 i, j, nr_rt_entries = 0;
|
|
int r;
|
|
|
|
for (i = 0; i < nr; ++i) {
|
|
if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES)
|
|
return -EINVAL;
|
|
nr_rt_entries = max(nr_rt_entries, ue[i].gsi);
|
|
}
|
|
|
|
nr_rt_entries += 1;
|
|
|
|
new = kzalloc(sizeof(*new) + (nr_rt_entries * sizeof(struct hlist_head))
|
|
+ (nr * sizeof(struct kvm_kernel_irq_routing_entry)),
|
|
GFP_KERNEL);
|
|
|
|
if (!new)
|
|
return -ENOMEM;
|
|
|
|
new->rt_entries = (void *)&new->map[nr_rt_entries];
|
|
|
|
new->nr_rt_entries = nr_rt_entries;
|
|
for (i = 0; i < 3; i++)
|
|
for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++)
|
|
new->chip[i][j] = -1;
|
|
|
|
for (i = 0; i < nr; ++i) {
|
|
r = -EINVAL;
|
|
if (ue->flags)
|
|
goto out;
|
|
r = setup_routing_entry(new, &new->rt_entries[i], ue);
|
|
if (r)
|
|
goto out;
|
|
++ue;
|
|
}
|
|
|
|
mutex_lock(&kvm->irq_lock);
|
|
old = kvm->irq_routing;
|
|
rcu_assign_pointer(kvm->irq_routing, new);
|
|
mutex_unlock(&kvm->irq_lock);
|
|
synchronize_rcu();
|
|
|
|
new = old;
|
|
r = 0;
|
|
|
|
out:
|
|
kfree(new);
|
|
return r;
|
|
}
|
|
|
|
#define IOAPIC_ROUTING_ENTRY(irq) \
|
|
{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
|
|
.u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
|
|
#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
|
|
|
|
#ifdef CONFIG_X86
|
|
# define PIC_ROUTING_ENTRY(irq) \
|
|
{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
|
|
.u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
|
|
# define ROUTING_ENTRY2(irq) \
|
|
IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
|
|
#else
|
|
# define ROUTING_ENTRY2(irq) \
|
|
IOAPIC_ROUTING_ENTRY(irq)
|
|
#endif
|
|
|
|
static const struct kvm_irq_routing_entry default_routing[] = {
|
|
ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
|
|
ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
|
|
ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
|
|
ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
|
|
ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
|
|
ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
|
|
ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
|
|
ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
|
|
ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
|
|
ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
|
|
ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
|
|
ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
|
|
#ifdef CONFIG_IA64
|
|
ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
|
|
ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
|
|
ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
|
|
ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
|
|
ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
|
|
ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
|
|
ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
|
|
ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
|
|
ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
|
|
ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
|
|
ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
|
|
ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
|
|
#endif
|
|
};
|
|
|
|
int kvm_setup_default_irq_routing(struct kvm *kvm)
|
|
{
|
|
return kvm_set_irq_routing(kvm, default_routing,
|
|
ARRAY_SIZE(default_routing), 0);
|
|
}
|