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c62da8a8a9
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230718143054.1065288-1-robh@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
207 lines
5.0 KiB
C
207 lines
5.0 KiB
C
/*
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* Driver for MMC and SSD cards for Cavium ThunderX SOCs.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2016 Cavium Inc.
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*/
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/mmc/mmc.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include "cavium.h"
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static void thunder_mmc_acquire_bus(struct cvm_mmc_host *host)
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{
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down(&host->mmc_serializer);
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}
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static void thunder_mmc_release_bus(struct cvm_mmc_host *host)
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{
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up(&host->mmc_serializer);
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}
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static void thunder_mmc_int_enable(struct cvm_mmc_host *host, u64 val)
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{
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writeq(val, host->base + MIO_EMM_INT(host));
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writeq(val, host->base + MIO_EMM_INT_EN_SET(host));
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}
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static int thunder_mmc_register_interrupts(struct cvm_mmc_host *host,
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struct pci_dev *pdev)
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{
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int nvec, ret, i;
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nvec = pci_alloc_irq_vectors(pdev, 1, 9, PCI_IRQ_MSIX);
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if (nvec < 0)
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return nvec;
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/* register interrupts */
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for (i = 0; i < nvec; i++) {
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ret = devm_request_irq(&pdev->dev, pci_irq_vector(pdev, i),
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cvm_mmc_interrupt,
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0, cvm_mmc_irq_names[i], host);
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if (ret)
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return ret;
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}
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return 0;
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}
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static int thunder_mmc_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct device_node *node = pdev->dev.of_node;
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struct device *dev = &pdev->dev;
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struct device_node *child_node;
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struct cvm_mmc_host *host;
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int ret, i = 0;
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host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
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if (!host)
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return -ENOMEM;
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pci_set_drvdata(pdev, host);
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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ret = pci_request_regions(pdev, KBUILD_MODNAME);
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if (ret)
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return ret;
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host->base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
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if (!host->base) {
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ret = -EINVAL;
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goto error;
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}
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/* On ThunderX these are identical */
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host->dma_base = host->base;
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host->reg_off = 0x2000;
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host->reg_off_dma = 0x160;
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host->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(host->clk)) {
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ret = PTR_ERR(host->clk);
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goto error;
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}
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ret = clk_prepare_enable(host->clk);
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if (ret)
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goto error;
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host->sys_freq = clk_get_rate(host->clk);
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spin_lock_init(&host->irq_handler_lock);
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sema_init(&host->mmc_serializer, 1);
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host->dev = dev;
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host->acquire_bus = thunder_mmc_acquire_bus;
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host->release_bus = thunder_mmc_release_bus;
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host->int_enable = thunder_mmc_int_enable;
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host->use_sg = true;
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host->big_dma_addr = true;
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host->need_irq_handler_lock = true;
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host->last_slot = -1;
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ret = dma_set_mask(dev, DMA_BIT_MASK(48));
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if (ret)
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goto error;
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/*
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* Clear out any pending interrupts that may be left over from
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* bootloader. Writing 1 to the bits clears them.
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*/
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writeq(127, host->base + MIO_EMM_INT_EN(host));
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writeq(3, host->base + MIO_EMM_DMA_INT_ENA_W1C(host));
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/* Clear DMA FIFO */
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writeq(BIT_ULL(16), host->base + MIO_EMM_DMA_FIFO_CFG(host));
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ret = thunder_mmc_register_interrupts(host, pdev);
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if (ret)
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goto error;
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for_each_child_of_node(node, child_node) {
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/*
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* mmc_of_parse and devm* require one device per slot.
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* Create a dummy device per slot and set the node pointer to
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* the slot. The easiest way to get this is using
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* of_platform_device_create.
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*/
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if (of_device_is_compatible(child_node, "mmc-slot")) {
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host->slot_pdev[i] = of_platform_device_create(child_node, NULL,
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&pdev->dev);
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if (!host->slot_pdev[i])
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continue;
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ret = cvm_mmc_of_slot_probe(&host->slot_pdev[i]->dev, host);
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if (ret) {
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of_node_put(child_node);
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goto error;
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}
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}
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i++;
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}
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dev_info(dev, "probed\n");
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return 0;
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error:
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for (i = 0; i < CAVIUM_MAX_MMC; i++) {
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if (host->slot[i])
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cvm_mmc_of_slot_remove(host->slot[i]);
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if (host->slot_pdev[i]) {
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get_device(&host->slot_pdev[i]->dev);
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of_platform_device_destroy(&host->slot_pdev[i]->dev, NULL);
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put_device(&host->slot_pdev[i]->dev);
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}
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}
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clk_disable_unprepare(host->clk);
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pci_release_regions(pdev);
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return ret;
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}
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static void thunder_mmc_remove(struct pci_dev *pdev)
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{
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struct cvm_mmc_host *host = pci_get_drvdata(pdev);
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u64 dma_cfg;
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int i;
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for (i = 0; i < CAVIUM_MAX_MMC; i++)
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if (host->slot[i])
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cvm_mmc_of_slot_remove(host->slot[i]);
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dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host));
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dma_cfg &= ~MIO_EMM_DMA_CFG_EN;
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writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host));
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clk_disable_unprepare(host->clk);
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pci_release_regions(pdev);
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}
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static const struct pci_device_id thunder_mmc_id_table[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa010) },
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{ 0, } /* end of table */
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};
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static struct pci_driver thunder_mmc_driver = {
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.name = KBUILD_MODNAME,
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.id_table = thunder_mmc_id_table,
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.probe = thunder_mmc_probe,
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.remove = thunder_mmc_remove,
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};
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module_pci_driver(thunder_mmc_driver);
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MODULE_AUTHOR("Cavium Inc.");
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MODULE_DESCRIPTION("Cavium ThunderX eMMC Driver");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, thunder_mmc_id_table);
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