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baaa1b8e7d
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Tested-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20240206071314.8721-10-liubo03@inspur.com Signed-off-by: Lee Jones <lee@kernel.org>
394 lines
11 KiB
C
394 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Lochnagar I2C bus interface
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*
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* Copyright (c) 2012-2018 Cirrus Logic, Inc. and
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* Cirrus Logic International Semiconductor Ltd.
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*
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* Author: Charles Keepax <ckeepax@opensource.cirrus.com>
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/lockdep.h>
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#include <linux/mfd/core.h>
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#include <linux/mod_devicetable.h>
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#include <linux/mutex.h>
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#include <linux/of_platform.h>
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#include <linux/regmap.h>
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#include <linux/mfd/lochnagar.h>
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#include <linux/mfd/lochnagar1_regs.h>
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#include <linux/mfd/lochnagar2_regs.h>
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#define LOCHNAGAR_BOOT_RETRIES 10
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#define LOCHNAGAR_BOOT_DELAY_MS 350
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#define LOCHNAGAR_CONFIG_POLL_US 10000
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static bool lochnagar1_readable_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case LOCHNAGAR_SOFTWARE_RESET:
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case LOCHNAGAR_FIRMWARE_ID1...LOCHNAGAR_FIRMWARE_ID2:
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case LOCHNAGAR1_CDC_AIF1_SEL...LOCHNAGAR1_CDC_AIF3_SEL:
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case LOCHNAGAR1_CDC_MCLK1_SEL...LOCHNAGAR1_CDC_MCLK2_SEL:
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case LOCHNAGAR1_CDC_AIF_CTRL1...LOCHNAGAR1_CDC_AIF_CTRL2:
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case LOCHNAGAR1_EXT_AIF_CTRL:
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case LOCHNAGAR1_DSP_AIF1_SEL...LOCHNAGAR1_DSP_AIF2_SEL:
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case LOCHNAGAR1_DSP_CLKIN_SEL:
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case LOCHNAGAR1_DSP_AIF:
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case LOCHNAGAR1_GF_AIF1...LOCHNAGAR1_GF_AIF2:
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case LOCHNAGAR1_PSIA_AIF:
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case LOCHNAGAR1_PSIA1_SEL...LOCHNAGAR1_PSIA2_SEL:
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case LOCHNAGAR1_SPDIF_AIF_SEL:
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case LOCHNAGAR1_GF_AIF3_SEL...LOCHNAGAR1_GF_AIF4_SEL:
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case LOCHNAGAR1_GF_CLKOUT1_SEL:
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case LOCHNAGAR1_GF_AIF1_SEL...LOCHNAGAR1_GF_AIF2_SEL:
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case LOCHNAGAR1_GF_GPIO2...LOCHNAGAR1_GF_GPIO7:
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case LOCHNAGAR1_RST:
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case LOCHNAGAR1_LED1...LOCHNAGAR1_LED2:
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case LOCHNAGAR1_I2C_CTRL:
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_config lochnagar1_i2c_regmap = {
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.reg_bits = 8,
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.val_bits = 8,
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.reg_format_endian = REGMAP_ENDIAN_BIG,
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.val_format_endian = REGMAP_ENDIAN_BIG,
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.max_register = 0x50,
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.readable_reg = lochnagar1_readable_register,
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.use_single_read = true,
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.use_single_write = true,
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.cache_type = REGCACHE_MAPLE,
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};
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static const struct reg_sequence lochnagar1_patch[] = {
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{ 0x40, 0x0083 },
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{ 0x47, 0x0018 },
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{ 0x50, 0x0000 },
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};
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static bool lochnagar2_readable_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case LOCHNAGAR_SOFTWARE_RESET:
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case LOCHNAGAR_FIRMWARE_ID1...LOCHNAGAR_FIRMWARE_ID2:
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case LOCHNAGAR2_CDC_AIF1_CTRL...LOCHNAGAR2_CDC_AIF3_CTRL:
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case LOCHNAGAR2_DSP_AIF1_CTRL...LOCHNAGAR2_DSP_AIF2_CTRL:
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case LOCHNAGAR2_PSIA1_CTRL...LOCHNAGAR2_PSIA2_CTRL:
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case LOCHNAGAR2_GF_AIF3_CTRL...LOCHNAGAR2_GF_AIF4_CTRL:
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case LOCHNAGAR2_GF_AIF1_CTRL...LOCHNAGAR2_GF_AIF2_CTRL:
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case LOCHNAGAR2_SPDIF_AIF_CTRL:
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case LOCHNAGAR2_USB_AIF1_CTRL...LOCHNAGAR2_USB_AIF2_CTRL:
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case LOCHNAGAR2_ADAT_AIF_CTRL:
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case LOCHNAGAR2_CDC_MCLK1_CTRL...LOCHNAGAR2_CDC_MCLK2_CTRL:
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case LOCHNAGAR2_DSP_CLKIN_CTRL:
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case LOCHNAGAR2_PSIA1_MCLK_CTRL...LOCHNAGAR2_PSIA2_MCLK_CTRL:
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case LOCHNAGAR2_SPDIF_MCLK_CTRL:
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case LOCHNAGAR2_GF_CLKOUT1_CTRL...LOCHNAGAR2_GF_CLKOUT2_CTRL:
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case LOCHNAGAR2_ADAT_MCLK_CTRL:
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case LOCHNAGAR2_SOUNDCARD_MCLK_CTRL:
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case LOCHNAGAR2_GPIO_FPGA_GPIO1...LOCHNAGAR2_GPIO_FPGA_GPIO6:
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case LOCHNAGAR2_GPIO_CDC_GPIO1...LOCHNAGAR2_GPIO_CDC_GPIO8:
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case LOCHNAGAR2_GPIO_DSP_GPIO1...LOCHNAGAR2_GPIO_DSP_GPIO6:
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case LOCHNAGAR2_GPIO_GF_GPIO2...LOCHNAGAR2_GPIO_GF_GPIO7:
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case LOCHNAGAR2_GPIO_CDC_AIF1_BCLK...LOCHNAGAR2_GPIO_CDC_AIF3_TXDAT:
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case LOCHNAGAR2_GPIO_DSP_AIF1_BCLK...LOCHNAGAR2_GPIO_DSP_AIF2_TXDAT:
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case LOCHNAGAR2_GPIO_PSIA1_BCLK...LOCHNAGAR2_GPIO_PSIA2_TXDAT:
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case LOCHNAGAR2_GPIO_GF_AIF3_BCLK...LOCHNAGAR2_GPIO_GF_AIF4_TXDAT:
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case LOCHNAGAR2_GPIO_GF_AIF1_BCLK...LOCHNAGAR2_GPIO_GF_AIF2_TXDAT:
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case LOCHNAGAR2_GPIO_DSP_UART1_RX...LOCHNAGAR2_GPIO_DSP_UART2_TX:
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case LOCHNAGAR2_GPIO_GF_UART2_RX...LOCHNAGAR2_GPIO_GF_UART2_TX:
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case LOCHNAGAR2_GPIO_USB_UART_RX:
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case LOCHNAGAR2_GPIO_CDC_PDMCLK1...LOCHNAGAR2_GPIO_CDC_PDMDAT2:
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case LOCHNAGAR2_GPIO_CDC_DMICCLK1...LOCHNAGAR2_GPIO_CDC_DMICDAT4:
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case LOCHNAGAR2_GPIO_DSP_DMICCLK1...LOCHNAGAR2_GPIO_DSP_DMICDAT2:
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case LOCHNAGAR2_GPIO_I2C2_SCL...LOCHNAGAR2_GPIO_I2C4_SDA:
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case LOCHNAGAR2_GPIO_DSP_STANDBY:
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case LOCHNAGAR2_GPIO_CDC_MCLK1...LOCHNAGAR2_GPIO_CDC_MCLK2:
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case LOCHNAGAR2_GPIO_DSP_CLKIN:
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case LOCHNAGAR2_GPIO_PSIA1_MCLK...LOCHNAGAR2_GPIO_PSIA2_MCLK:
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case LOCHNAGAR2_GPIO_GF_GPIO1...LOCHNAGAR2_GPIO_GF_GPIO5:
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case LOCHNAGAR2_GPIO_DSP_GPIO20:
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case LOCHNAGAR2_GPIO_CHANNEL1...LOCHNAGAR2_GPIO_CHANNEL16:
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case LOCHNAGAR2_MINICARD_RESETS:
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case LOCHNAGAR2_ANALOGUE_PATH_CTRL1...LOCHNAGAR2_ANALOGUE_PATH_CTRL2:
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case LOCHNAGAR2_COMMS_CTRL4:
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case LOCHNAGAR2_SPDIF_CTRL:
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case LOCHNAGAR2_IMON_CTRL1...LOCHNAGAR2_IMON_CTRL4:
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case LOCHNAGAR2_IMON_DATA1...LOCHNAGAR2_IMON_DATA2:
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case LOCHNAGAR2_POWER_CTRL:
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case LOCHNAGAR2_MICVDD_CTRL1:
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case LOCHNAGAR2_MICVDD_CTRL2:
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case LOCHNAGAR2_VDDCORE_CDC_CTRL1:
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case LOCHNAGAR2_VDDCORE_CDC_CTRL2:
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case LOCHNAGAR2_SOUNDCARD_AIF_CTRL:
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return true;
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default:
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return false;
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}
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}
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static bool lochnagar2_volatile_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case LOCHNAGAR2_GPIO_CHANNEL1...LOCHNAGAR2_GPIO_CHANNEL16:
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case LOCHNAGAR2_ANALOGUE_PATH_CTRL1:
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case LOCHNAGAR2_IMON_CTRL3...LOCHNAGAR2_IMON_CTRL4:
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case LOCHNAGAR2_IMON_DATA1...LOCHNAGAR2_IMON_DATA2:
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_config lochnagar2_i2c_regmap = {
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.reg_bits = 16,
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.val_bits = 16,
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.reg_format_endian = REGMAP_ENDIAN_BIG,
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.val_format_endian = REGMAP_ENDIAN_BIG,
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.max_register = 0x1F1F,
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.readable_reg = lochnagar2_readable_register,
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.volatile_reg = lochnagar2_volatile_register,
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.cache_type = REGCACHE_MAPLE,
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};
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static const struct reg_sequence lochnagar2_patch[] = {
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{ 0x00EE, 0x0000 },
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};
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struct lochnagar_config {
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int id;
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const char * const name;
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enum lochnagar_type type;
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const struct regmap_config *regmap;
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const struct reg_sequence *patch;
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int npatch;
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};
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static struct lochnagar_config lochnagar_configs[] = {
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{
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.id = 0x50,
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.name = "lochnagar1",
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.type = LOCHNAGAR1,
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.regmap = &lochnagar1_i2c_regmap,
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.patch = lochnagar1_patch,
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.npatch = ARRAY_SIZE(lochnagar1_patch),
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},
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{
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.id = 0xCB58,
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.name = "lochnagar2",
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.type = LOCHNAGAR2,
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.regmap = &lochnagar2_i2c_regmap,
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.patch = lochnagar2_patch,
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.npatch = ARRAY_SIZE(lochnagar2_patch),
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},
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};
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static const struct of_device_id lochnagar_of_match[] = {
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{ .compatible = "cirrus,lochnagar1", .data = &lochnagar_configs[0] },
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{ .compatible = "cirrus,lochnagar2", .data = &lochnagar_configs[1] },
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{},
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};
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static int lochnagar_wait_for_boot(struct regmap *regmap, unsigned int *id)
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{
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int i, ret;
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for (i = 0; i < LOCHNAGAR_BOOT_RETRIES; ++i) {
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msleep(LOCHNAGAR_BOOT_DELAY_MS);
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/* The reset register will return the device ID when read */
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ret = regmap_read(regmap, LOCHNAGAR_SOFTWARE_RESET, id);
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if (!ret)
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return ret;
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}
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return -ETIMEDOUT;
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}
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/**
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* lochnagar_update_config - Synchronise the boards analogue configuration to
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* the hardware.
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*
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* @lochnagar: A pointer to the primary core data structure.
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*
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* Return: Zero on success or an appropriate negative error code on failure.
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*/
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int lochnagar_update_config(struct lochnagar *lochnagar)
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{
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struct regmap *regmap = lochnagar->regmap;
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unsigned int done = LOCHNAGAR2_ANALOGUE_PATH_UPDATE_STS_MASK;
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int timeout_ms = LOCHNAGAR_BOOT_DELAY_MS * LOCHNAGAR_BOOT_RETRIES;
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unsigned int val = 0;
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int ret;
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lockdep_assert_held(&lochnagar->analogue_config_lock);
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if (lochnagar->type != LOCHNAGAR2)
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return 0;
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/*
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* Toggle the ANALOGUE_PATH_UPDATE bit and wait for the device to
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* acknowledge that any outstanding changes to the analogue
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* configuration have been applied.
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*/
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ret = regmap_write(regmap, LOCHNAGAR2_ANALOGUE_PATH_CTRL1, 0);
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if (ret < 0)
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return ret;
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ret = regmap_write(regmap, LOCHNAGAR2_ANALOGUE_PATH_CTRL1,
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LOCHNAGAR2_ANALOGUE_PATH_UPDATE_MASK);
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if (ret < 0)
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return ret;
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ret = regmap_read_poll_timeout(regmap,
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LOCHNAGAR2_ANALOGUE_PATH_CTRL1, val,
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(val & done), LOCHNAGAR_CONFIG_POLL_US,
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timeout_ms * 1000);
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if (ret < 0)
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return ret;
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return 0;
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}
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EXPORT_SYMBOL_GPL(lochnagar_update_config);
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static int lochnagar_i2c_probe(struct i2c_client *i2c)
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{
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struct device *dev = &i2c->dev;
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const struct lochnagar_config *config = NULL;
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struct lochnagar *lochnagar;
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struct gpio_desc *reset, *present;
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unsigned int val;
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unsigned int firmwareid;
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unsigned int devid, rev;
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int ret;
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lochnagar = devm_kzalloc(dev, sizeof(*lochnagar), GFP_KERNEL);
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if (!lochnagar)
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return -ENOMEM;
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config = i2c_get_match_data(i2c);
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lochnagar->dev = dev;
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mutex_init(&lochnagar->analogue_config_lock);
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dev_set_drvdata(dev, lochnagar);
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reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
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if (IS_ERR(reset)) {
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ret = PTR_ERR(reset);
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dev_err(dev, "Failed to get reset GPIO: %d\n", ret);
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return ret;
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}
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present = devm_gpiod_get_optional(dev, "present", GPIOD_OUT_HIGH);
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if (IS_ERR(present)) {
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ret = PTR_ERR(present);
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dev_err(dev, "Failed to get present GPIO: %d\n", ret);
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return ret;
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}
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/* Leave the Lochnagar in reset for a reasonable amount of time */
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msleep(20);
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/* Bring Lochnagar out of reset */
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gpiod_set_value_cansleep(reset, 1);
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/* Identify Lochnagar */
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lochnagar->type = config->type;
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lochnagar->regmap = devm_regmap_init_i2c(i2c, config->regmap);
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if (IS_ERR(lochnagar->regmap)) {
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ret = PTR_ERR(lochnagar->regmap);
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dev_err(dev, "Failed to allocate register map: %d\n", ret);
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return ret;
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}
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/* Wait for Lochnagar to boot */
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ret = lochnagar_wait_for_boot(lochnagar->regmap, &val);
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if (ret < 0) {
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dev_err(dev, "Failed to read device ID: %d\n", ret);
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return ret;
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}
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devid = val & LOCHNAGAR_DEVICE_ID_MASK;
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rev = val & LOCHNAGAR_REV_ID_MASK;
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if (devid != config->id) {
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dev_err(dev,
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"ID does not match %s (expected 0x%x got 0x%x)\n",
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config->name, config->id, devid);
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return -ENODEV;
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}
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/* Identify firmware */
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ret = regmap_read(lochnagar->regmap, LOCHNAGAR_FIRMWARE_ID1, &val);
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if (ret < 0) {
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dev_err(dev, "Failed to read firmware id 1: %d\n", ret);
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return ret;
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}
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firmwareid = val;
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ret = regmap_read(lochnagar->regmap, LOCHNAGAR_FIRMWARE_ID2, &val);
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if (ret < 0) {
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dev_err(dev, "Failed to read firmware id 2: %d\n", ret);
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return ret;
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}
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firmwareid |= (val << config->regmap->val_bits);
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dev_info(dev, "Found %s (0x%x) revision %u firmware 0x%.6x\n",
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config->name, devid, rev + 1, firmwareid);
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ret = regmap_register_patch(lochnagar->regmap, config->patch,
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config->npatch);
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if (ret < 0) {
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dev_err(dev, "Failed to register patch: %d\n", ret);
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return ret;
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}
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ret = devm_of_platform_populate(dev);
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if (ret < 0) {
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dev_err(dev, "Failed to populate child nodes: %d\n", ret);
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return ret;
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}
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return ret;
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}
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static struct i2c_driver lochnagar_i2c_driver = {
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.driver = {
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.name = "lochnagar",
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.of_match_table = lochnagar_of_match,
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.suppress_bind_attrs = true,
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},
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.probe = lochnagar_i2c_probe,
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};
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static int __init lochnagar_i2c_init(void)
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{
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int ret;
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ret = i2c_add_driver(&lochnagar_i2c_driver);
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if (ret)
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pr_err("Failed to register Lochnagar driver: %d\n", ret);
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return ret;
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}
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subsys_initcall(lochnagar_i2c_init);
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