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linux/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
Thomas Gleixner 1621633323 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 1 
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not write to the free software foundation inc
  51 franklin street fifth floor boston ma 02110 1301 usa

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option [no]_[pad]_[ctrl] any later version this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not write to the free
  software foundation inc 51 franklin street fifth floor boston ma
  02110 1301 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 176 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190519154040.652910950@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 11:28:39 +02:00

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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
*/
/dts-v1/;
#include "imx51-eukrea-cpuimx51.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Eukrea CPUIMX51";
compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51";
clocks {
clk24M: can_clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpiokeys_1>;
button-1 {
label = "BP1";
gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
linux,code = <256>;
wakeup-source;
linux,input-type = <1>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpioled>;
led1 {
label = "led1";
gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_can: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "CAN_RST";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
startup-delay-us = <20000>;
enable-active-high;
};
};
sound {
compatible = "eukrea,asoc-tlv320";
eukrea,model = "imx51-eukrea-tlv320aic23";
ssi-controller = <&ssi2>;
fsl,mux-int-port = <2>;
fsl,mux-ext-port = <3>;
};
usbphy1: usbphy1 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
clock-names = "main_clk";
clock-frequency = <19200000>;
#phy-cells = <0>;
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
};
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
status = "okay";
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
status = "okay";
can0: can@0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can>;
compatible = "microchip,mcp2515";
reg = <0>;
clocks = <&clk24M>;
spi-max-frequency = <10000000>;
interrupt-parent = <&gpio1>;
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
vdd-supply = <&reg_can>;
};
};
&i2c1 {
tlv320aic23: codec@1a {
compatible = "ti,tlv320aic23";
reg = <0x1a>;
};
};
&iomuxc {
imx51-eukrea {
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000
MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x80000000
MX51_PAD_AUD3_BB_CK__AUD3_TXC 0x80000000
MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000
>;
};
pinctrl_can: cangrp {
fsl,pins = <
MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x80000000 /* nReset */
MX51_PAD_GPIO1_1__GPIO1_1 0x80000000 /* IRQ */
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
MX51_PAD_CSPI1_SS0__GPIO4_24 0x80000000 /* CS0 */
>;
};
pinctrl_esdhc1: esdhc1grp {
fsl,pins = <
MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
>;
};
pinctrl_uart3_rtscts: uart3rtsctsgrp {
fsl,pins = <
MX51_PAD_KEY_COL4__UART3_RTS 0x1c5
MX51_PAD_KEY_COL5__UART3_CTS 0x1c5
>;
};
pinctrl_backlight_1: backlightgrp-1 {
fsl,pins = <
MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5
>;
};
pinctrl_esdhc1_cd: esdhc1_cd {
fsl,pins = <
MX51_PAD_GPIO1_0__GPIO1_0 0xd5
>;
};
pinctrl_gpiokeys_1: gpiokeysgrp-1 {
fsl,pins = <
MX51_PAD_NANDF_D9__GPIO3_31 0x1f5
>;
};
pinctrl_gpioled: gpioledgrp-1 {
fsl,pins = <
MX51_PAD_NANDF_D10__GPIO3_30 0x80000000
>;
};
pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
fsl,pins = <
MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
>;
};
pinctrl_usbh1: usbh1grp {
fsl,pins = <
MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5
MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5
MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5
MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
MX51_PAD_USBH1_STP__USBH1_STP 0x1e5
>;
};
pinctrl_usbh1_vbus: usbh1-vbusgrp {
fsl,pins = <
MX51_PAD_EIM_CS3__GPIO2_28 0x1f5
>;
};
};
};
&ssi2 {
codec-handle = <&tlv320aic23>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
uart-has-rtscts;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
uart-has-rtscts;
status = "okay";
};
&usbh1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1>;
fsl,usbphy = <&usbphy1>;
dr_mode = "host";
phy_type = "ulpi";
status = "okay";
};
&usbotg {
dr_mode = "otg";
phy_type = "utmi_wide";
status = "okay";
};
&usbphy0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1_vbus>;
reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
};
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