Dan Williams 5f02ece176 cxl/core: Fix potential payload size confusion in cxl_mem_get_poison() ... [ Upstream commit 4b759dd576 ] A recent change to cxl_mem_get_records_log() [1] highlighted a subtle nuance of looping calls to cxl_internal_send_cmd(), i.e. that cxl_internal_send_cmd() modifies the 'size_out' member of the @mbox_cmd argument. That mechanism is useful for communicating underflow, but it is unwanted when reusing @mbox_cmd for a subsequent submission. It turns out that cxl_xfer_log() avoids this scenario by always redefining @mbox_cmd each iteration. Update cxl_mem_get_records_log() and cxl_mem_get_poison() to follow the same style as cxl_xfer_log(), i.e. re-define @mbox_cmd each iteration. The cxl_mem_get_records_log() change is just a style fixup, but the cxl_mem_get_poison() change is a potential fix, per Alison [2]: Poison list retrieval can hit this case if the MORE flag is set and a follow on read of the list delivers more records than the previous read. ie. device gives one record, sets the _MORE flag, then gives 5. Not an urgent fix since this behavior has not been seen in the wild, but worth tracking as a fix. Cc: Kwangjin Ko <kwangjin.ko@sk.com> Cc: Alison Schofield <alison.schofield@intel.com> Fixes: ed83f7ca39 ("cxl/mbox: Add GET_POISON_LIST mailbox command") Link: http://lore.kernel.org/r/20240402081404.1106-2-kwangjin.ko@sk.com [1] Link: http://lore.kernel.org/r/ZhAhAL/GOaWFrauw@aschofie-mobl2 [2] Signed-off-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Link: https://lore.kernel.org/r/171235441633.2716581.12330082428680958635.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2024-05-02 16:35:16 +02:00
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core	cxl/core: Fix potential payload size confusion in cxl_mem_get_poison()	2024-05-02 16:35:16 +02:00
acpi.c	ACPI: HMAT / cxl: Add retrieval of generic port coordinates for both access classes	2024-04-17 11:23:29 +02:00
cxl.h	cxl: Split out host bridge access coordinates	2024-04-17 11:23:30 +02:00
cxlmem.h	cxl: Change 'struct cxl_memdev_state' *_perf_list to single 'struct cxl_dpa_perf'	2024-02-16 23:20:34 -08:00
cxlpci.h	cxl: Calculate and store PCI link latency for the downstream ports	2023-12-22 14:53:49 -08:00
Kconfig	cxl: Add callback to parse the DSMAS subtables from CDAT	2023-12-22 14:33:10 -08:00
Makefile	cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operation	2022-11-30 16:30:47 -08:00
mem.c	cxl: Fix sysfs export of qos_class for memdev	2024-02-16 23:20:34 -08:00
pci.c	acpi/ghes: Remove CXL CPER notifications	2024-02-20 22:50:52 -08:00
pmem.c	cxl/mbox: Move mailbox related driver state to its own data structure	2023-06-25 14:31:08 -07:00
pmu.h	cxl/pci: Find and register CXL PMU devices	2023-05-30 11:20:35 -07:00
port.c	cxl: Refactor to use __free() for cxl_root allocation in cxl_endpoint_port_probe()	2024-01-05 14:36:29 -08:00
security.c	Merge branch 'for-6.5/cxl-type-2' into for-6.5/cxl	2023-06-25 17:16:51 -07:00