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16ecba59bc
Removes the ICR read in the other interrupt handler, uses EIAC to autoclear the Other bit from ICR and IMS. This allows us to avoid interference with Rx and Tx interrupts in the Other interrupt handler. The information read from ICR is not needed. IMS is configured such that the only interrupt cause that can trigger the Other interrupt is Link Status Change. Signed-off-by: Benjamin Poirier <bpoirier@suse.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
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| .. | ||
| 80003es2lan.c | ||
| 80003es2lan.h | ||
| 82571.c | ||
| 82571.h | ||
| defines.h | ||
| e1000.h | ||
| ethtool.c | ||
| hw.h | ||
| ich8lan.c | ||
| ich8lan.h | ||
| mac.c | ||
| mac.h | ||
| Makefile | ||
| manage.c | ||
| manage.h | ||
| netdev.c | ||
| nvm.c | ||
| nvm.h | ||
| param.c | ||
| phy.c | ||
| phy.h | ||
| ptp.c | ||
| regs.h | ||