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1620f09b96
If a user posts WR by wr_list, the head pointer of idx_queue won't be
updated until all wqes are filled, so the judgment of whether head equals
to tail will get a wrong result. Fix above issue and move the head and
tail pointer from the srq structure into the idx_queue structure. After
idx_queue is filled with wqe idx, the head pointer of it will increase.
Fixes: c7bcb13442
("RDMA/hns: Add SRQ support for hip08 kernel mode")
Link: https://lore.kernel.org/r/1611997090-48820-3-git-send-email-liweihang@huawei.com
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
435 lines
11 KiB
C
435 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
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/*
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* Copyright (c) 2018 Hisilicon Limited.
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*/
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#include <linux/pci.h>
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#include <rdma/ib_umem.h>
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#include "hns_roce_device.h"
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#include "hns_roce_cmd.h"
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#include "hns_roce_hem.h"
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void hns_roce_srq_event(struct hns_roce_dev *hr_dev, u32 srqn, int event_type)
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{
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struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
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struct hns_roce_srq *srq;
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xa_lock(&srq_table->xa);
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srq = xa_load(&srq_table->xa, srqn & (hr_dev->caps.num_srqs - 1));
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if (srq)
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atomic_inc(&srq->refcount);
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xa_unlock(&srq_table->xa);
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if (!srq) {
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dev_warn(hr_dev->dev, "Async event for bogus SRQ %08x\n", srqn);
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return;
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}
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srq->event(srq, event_type);
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if (atomic_dec_and_test(&srq->refcount))
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complete(&srq->free);
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}
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static void hns_roce_ib_srq_event(struct hns_roce_srq *srq,
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enum hns_roce_event event_type)
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{
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struct hns_roce_dev *hr_dev = to_hr_dev(srq->ibsrq.device);
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struct ib_srq *ibsrq = &srq->ibsrq;
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struct ib_event event;
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if (ibsrq->event_handler) {
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event.device = ibsrq->device;
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event.element.srq = ibsrq;
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switch (event_type) {
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case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH:
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event.event = IB_EVENT_SRQ_LIMIT_REACHED;
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break;
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case HNS_ROCE_EVENT_TYPE_SRQ_CATAS_ERROR:
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event.event = IB_EVENT_SRQ_ERR;
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break;
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default:
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dev_err(hr_dev->dev,
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"hns_roce:Unexpected event type 0x%x on SRQ %06lx\n",
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event_type, srq->srqn);
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return;
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}
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ibsrq->event_handler(&event, ibsrq->srq_context);
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}
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}
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static int hns_roce_hw_create_srq(struct hns_roce_dev *dev,
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struct hns_roce_cmd_mailbox *mailbox,
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unsigned long srq_num)
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{
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return hns_roce_cmd_mbox(dev, mailbox->dma, 0, srq_num, 0,
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HNS_ROCE_CMD_CREATE_SRQ,
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HNS_ROCE_CMD_TIMEOUT_MSECS);
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}
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static int hns_roce_hw_destroy_srq(struct hns_roce_dev *dev,
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struct hns_roce_cmd_mailbox *mailbox,
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unsigned long srq_num)
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{
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return hns_roce_cmd_mbox(dev, 0, mailbox ? mailbox->dma : 0, srq_num,
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mailbox ? 0 : 1, HNS_ROCE_CMD_DESTROY_SRQ,
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HNS_ROCE_CMD_TIMEOUT_MSECS);
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}
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static int alloc_srqc(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq,
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u32 pdn, u32 cqn, u16 xrcd, u64 db_rec_addr)
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{
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struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
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struct ib_device *ibdev = &hr_dev->ib_dev;
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struct hns_roce_cmd_mailbox *mailbox;
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u64 mtts_wqe[MTT_MIN_COUNT] = { 0 };
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u64 mtts_idx[MTT_MIN_COUNT] = { 0 };
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dma_addr_t dma_handle_wqe = 0;
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dma_addr_t dma_handle_idx = 0;
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int ret;
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/* Get the physical address of srq buf */
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ret = hns_roce_mtr_find(hr_dev, &srq->buf_mtr, 0, mtts_wqe,
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ARRAY_SIZE(mtts_wqe), &dma_handle_wqe);
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if (ret < 1) {
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ibdev_err(ibdev, "failed to find mtr for SRQ WQE, ret = %d.\n",
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ret);
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return -ENOBUFS;
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}
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/* Get physical address of idx que buf */
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ret = hns_roce_mtr_find(hr_dev, &srq->idx_que.mtr, 0, mtts_idx,
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ARRAY_SIZE(mtts_idx), &dma_handle_idx);
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if (ret < 1) {
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ibdev_err(ibdev, "failed to find mtr for SRQ idx, ret = %d.\n",
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ret);
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return -ENOBUFS;
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}
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ret = hns_roce_bitmap_alloc(&srq_table->bitmap, &srq->srqn);
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if (ret) {
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ibdev_err(ibdev,
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"failed to alloc SRQ number, ret = %d.\n", ret);
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return -ENOMEM;
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}
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ret = hns_roce_table_get(hr_dev, &srq_table->table, srq->srqn);
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if (ret) {
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ibdev_err(ibdev, "failed to get SRQC table, ret = %d.\n", ret);
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goto err_out;
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}
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ret = xa_err(xa_store(&srq_table->xa, srq->srqn, srq, GFP_KERNEL));
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if (ret) {
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ibdev_err(ibdev, "failed to store SRQC, ret = %d.\n", ret);
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goto err_put;
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}
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mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
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if (IS_ERR_OR_NULL(mailbox)) {
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ret = -ENOMEM;
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ibdev_err(ibdev, "failed to alloc mailbox for SRQC.\n");
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goto err_xa;
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}
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hr_dev->hw->write_srqc(hr_dev, srq, pdn, xrcd, cqn, mailbox->buf,
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mtts_wqe, mtts_idx, dma_handle_wqe,
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dma_handle_idx);
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ret = hns_roce_hw_create_srq(hr_dev, mailbox, srq->srqn);
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hns_roce_free_cmd_mailbox(hr_dev, mailbox);
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if (ret) {
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ibdev_err(ibdev, "failed to config SRQC, ret = %d.\n", ret);
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goto err_xa;
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}
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atomic_set(&srq->refcount, 1);
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init_completion(&srq->free);
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return ret;
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err_xa:
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xa_erase(&srq_table->xa, srq->srqn);
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err_put:
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hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn);
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err_out:
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hns_roce_bitmap_free(&srq_table->bitmap, srq->srqn, BITMAP_NO_RR);
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return ret;
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}
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static void free_srqc(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
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{
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struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
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int ret;
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ret = hns_roce_hw_destroy_srq(hr_dev, NULL, srq->srqn);
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if (ret)
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dev_err(hr_dev->dev, "DESTROY_SRQ failed (%d) for SRQN %06lx\n",
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ret, srq->srqn);
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xa_erase(&srq_table->xa, srq->srqn);
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if (atomic_dec_and_test(&srq->refcount))
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complete(&srq->free);
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wait_for_completion(&srq->free);
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hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn);
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hns_roce_bitmap_free(&srq_table->bitmap, srq->srqn, BITMAP_NO_RR);
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}
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static int alloc_srq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq,
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struct ib_udata *udata, unsigned long addr)
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{
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struct ib_device *ibdev = &hr_dev->ib_dev;
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struct hns_roce_buf_attr buf_attr = {};
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int err;
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srq->wqe_shift = ilog2(roundup_pow_of_two(max(HNS_ROCE_SGE_SIZE,
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HNS_ROCE_SGE_SIZE *
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srq->max_gs)));
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buf_attr.page_shift = hr_dev->caps.srqwqe_buf_pg_sz + HNS_HW_PAGE_SHIFT;
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buf_attr.region[0].size = to_hr_hem_entries_size(srq->wqe_cnt,
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srq->wqe_shift);
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buf_attr.region[0].hopnum = hr_dev->caps.srqwqe_hop_num;
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buf_attr.region_count = 1;
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err = hns_roce_mtr_create(hr_dev, &srq->buf_mtr, &buf_attr,
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hr_dev->caps.srqwqe_ba_pg_sz +
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HNS_HW_PAGE_SHIFT, udata, addr);
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if (err)
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ibdev_err(ibdev,
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"failed to alloc SRQ buf mtr, ret = %d.\n", err);
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return err;
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}
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static void free_srq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
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{
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hns_roce_mtr_destroy(hr_dev, &srq->buf_mtr);
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}
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static int alloc_srq_idx(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq,
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struct ib_udata *udata, unsigned long addr)
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{
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struct hns_roce_idx_que *idx_que = &srq->idx_que;
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struct ib_device *ibdev = &hr_dev->ib_dev;
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struct hns_roce_buf_attr buf_attr = {};
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int err;
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srq->idx_que.entry_shift = ilog2(HNS_ROCE_IDX_QUE_ENTRY_SZ);
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buf_attr.page_shift = hr_dev->caps.idx_buf_pg_sz + HNS_HW_PAGE_SHIFT;
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buf_attr.region[0].size = to_hr_hem_entries_size(srq->wqe_cnt,
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srq->idx_que.entry_shift);
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buf_attr.region[0].hopnum = hr_dev->caps.idx_hop_num;
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buf_attr.region_count = 1;
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err = hns_roce_mtr_create(hr_dev, &idx_que->mtr, &buf_attr,
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hr_dev->caps.idx_ba_pg_sz + HNS_HW_PAGE_SHIFT,
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udata, addr);
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if (err) {
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ibdev_err(ibdev,
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"failed to alloc SRQ idx mtr, ret = %d.\n", err);
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return err;
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}
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if (!udata) {
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idx_que->bitmap = bitmap_zalloc(srq->wqe_cnt, GFP_KERNEL);
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if (!idx_que->bitmap) {
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ibdev_err(ibdev, "failed to alloc SRQ idx bitmap.\n");
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err = -ENOMEM;
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goto err_idx_mtr;
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}
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}
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idx_que->head = 0;
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idx_que->tail = 0;
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return 0;
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err_idx_mtr:
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hns_roce_mtr_destroy(hr_dev, &idx_que->mtr);
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return err;
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}
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static void free_srq_idx(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
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{
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struct hns_roce_idx_que *idx_que = &srq->idx_que;
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bitmap_free(idx_que->bitmap);
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idx_que->bitmap = NULL;
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hns_roce_mtr_destroy(hr_dev, &idx_que->mtr);
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}
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static int alloc_srq_wrid(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
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{
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srq->wrid = kvmalloc_array(srq->wqe_cnt, sizeof(u64), GFP_KERNEL);
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if (!srq->wrid)
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return -ENOMEM;
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return 0;
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}
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static void free_srq_wrid(struct hns_roce_srq *srq)
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{
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kfree(srq->wrid);
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srq->wrid = NULL;
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}
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static u32 proc_srq_sge(struct hns_roce_dev *dev, struct hns_roce_srq *hr_srq,
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bool user)
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{
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u32 max_sge = dev->caps.max_srq_sges;
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if (dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)
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return max_sge;
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/* Reserve SGEs only for HIP08 in kernel; The userspace driver will
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* calculate number of max_sge with reserved SGEs when allocating wqe
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* buf, so there is no need to do this again in kernel. But the number
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* may exceed the capacity of SGEs recorded in the firmware, so the
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* kernel driver should just adapt the value accordingly.
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*/
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if (user)
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max_sge = roundup_pow_of_two(max_sge + 1);
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else
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hr_srq->rsv_sge = 1;
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return max_sge;
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}
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int hns_roce_create_srq(struct ib_srq *ib_srq,
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struct ib_srq_init_attr *init_attr,
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struct ib_udata *udata)
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{
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struct hns_roce_dev *hr_dev = to_hr_dev(ib_srq->device);
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struct hns_roce_ib_create_srq_resp resp = {};
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struct hns_roce_srq *srq = to_hr_srq(ib_srq);
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struct ib_device *ibdev = &hr_dev->ib_dev;
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struct hns_roce_ib_create_srq ucmd = {};
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u32 max_sge;
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int ret;
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u32 cqn;
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if (init_attr->srq_type != IB_SRQT_BASIC &&
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init_attr->srq_type != IB_SRQT_XRC)
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return -EOPNOTSUPP;
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max_sge = proc_srq_sge(hr_dev, srq, !!udata);
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if (init_attr->attr.max_wr >= hr_dev->caps.max_srq_wrs ||
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init_attr->attr.max_sge > max_sge) {
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ibdev_err(&hr_dev->ib_dev,
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"SRQ config error, depth = %u, sge = %d\n",
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init_attr->attr.max_wr, init_attr->attr.max_sge);
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return -EINVAL;
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}
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mutex_init(&srq->mutex);
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spin_lock_init(&srq->lock);
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srq->wqe_cnt = roundup_pow_of_two(init_attr->attr.max_wr + 1);
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srq->max_gs =
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roundup_pow_of_two(init_attr->attr.max_sge + srq->rsv_sge);
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init_attr->attr.max_wr = srq->wqe_cnt;
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init_attr->attr.max_sge = srq->max_gs;
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if (udata) {
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ret = ib_copy_from_udata(&ucmd, udata,
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min(udata->inlen, sizeof(ucmd)));
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if (ret) {
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ibdev_err(ibdev, "failed to copy SRQ udata, ret = %d.\n",
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ret);
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return ret;
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}
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}
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ret = alloc_srq_buf(hr_dev, srq, udata, ucmd.buf_addr);
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if (ret) {
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ibdev_err(ibdev,
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"failed to alloc SRQ buffer, ret = %d.\n", ret);
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return ret;
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}
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ret = alloc_srq_idx(hr_dev, srq, udata, ucmd.que_addr);
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if (ret) {
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ibdev_err(ibdev, "failed to alloc SRQ idx, ret = %d.\n", ret);
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goto err_buf_alloc;
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}
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if (!udata) {
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ret = alloc_srq_wrid(hr_dev, srq);
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if (ret) {
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ibdev_err(ibdev, "failed to alloc SRQ wrid, ret = %d.\n",
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ret);
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goto err_idx_alloc;
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}
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}
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cqn = ib_srq_has_cq(init_attr->srq_type) ?
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to_hr_cq(init_attr->ext.cq)->cqn : 0;
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srq->db_reg_l = hr_dev->reg_base + SRQ_DB_REG;
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ret = alloc_srqc(hr_dev, srq, to_hr_pd(ib_srq->pd)->pdn, cqn, 0, 0);
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if (ret) {
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ibdev_err(ibdev,
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"failed to alloc SRQ context, ret = %d.\n", ret);
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goto err_wrid_alloc;
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}
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srq->event = hns_roce_ib_srq_event;
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resp.srqn = srq->srqn;
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srq->max_gs = init_attr->attr.max_sge;
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init_attr->attr.max_sge = srq->max_gs - srq->rsv_sge;
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if (udata) {
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ret = ib_copy_to_udata(udata, &resp,
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min(udata->outlen, sizeof(resp)));
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if (ret)
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goto err_srqc_alloc;
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}
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return 0;
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err_srqc_alloc:
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free_srqc(hr_dev, srq);
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err_wrid_alloc:
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free_srq_wrid(srq);
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err_idx_alloc:
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free_srq_idx(hr_dev, srq);
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err_buf_alloc:
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free_srq_buf(hr_dev, srq);
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return ret;
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}
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int hns_roce_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata)
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{
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struct hns_roce_dev *hr_dev = to_hr_dev(ibsrq->device);
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struct hns_roce_srq *srq = to_hr_srq(ibsrq);
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free_srqc(hr_dev, srq);
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free_srq_idx(hr_dev, srq);
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free_srq_wrid(srq);
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free_srq_buf(hr_dev, srq);
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return 0;
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}
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int hns_roce_init_srq_table(struct hns_roce_dev *hr_dev)
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{
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struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
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xa_init(&srq_table->xa);
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return hns_roce_bitmap_init(&srq_table->bitmap, hr_dev->caps.num_srqs,
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hr_dev->caps.num_srqs - 1,
|
|
hr_dev->caps.reserved_srqs, 0);
|
|
}
|
|
|
|
void hns_roce_cleanup_srq_table(struct hns_roce_dev *hr_dev)
|
|
{
|
|
hns_roce_bitmap_cleanup(&hr_dev->srq_table.bitmap);
|
|
}
|