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15553dcbca
This commit first adds a trivial macro for spin_is_locked() to linux-kernel.def. It also adds cat code for enumerating all possible matches of lock write events (set LKW) with islocked events returning true (set RL, for Read from Lock), and unlock write events (set UL) with islocked events returning false (set RU, for Read from Unlock). Note that this intentionally does not model uniprocessor kernels (CONFIG_SMP=n) built with CONFIG_DEBUG_SPINLOCK=n, in which spin_is_locked() unconditionally returns zero. It also adds a pair of litmus tests demonstrating the minimal ordering provided by spin_is_locked() in conjunction with spin_lock(). Will Deacon noted that this minimal ordering happens on ARMv8: https://lkml.kernel.org/r/20180226162426.GB17158@arm.com Notice that herd7 installations strictly older than version 7.49 do not handle the new constructs. Signed-off-by: Luc Maranget <luc.maranget@inria.fr> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Reviewed-by: Alan Stern <stern@rowland.harvard.edu> Cc: Akira Yokosawa <akiyks@gmail.com> Cc: Andrea Parri <parri.andrea@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Boqun Feng <boqun.feng@gmail.com> Cc: David Howells <dhowells@redhat.com> Cc: Jade Alglave <j.alglave@ucl.ac.uk> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Luc Maranget <Luc.Maranget@inria.fr> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arch@vger.kernel.org Link: http://lkml.kernel.org/r/1526340837-12222-10-git-send-email-paulmck@linux.vnet.ibm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
142 lines
5.1 KiB
Plaintext
142 lines
5.1 KiB
Plaintext
This directory contains the following litmus tests:
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CoRR+poonceonce+Once.litmus
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Test of read-read coherence, that is, whether or not two
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successive reads from the same variable are ordered.
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CoRW+poonceonce+Once.litmus
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Test of read-write coherence, that is, whether or not a read
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from a given variable followed by a write to that same variable
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are ordered.
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CoWR+poonceonce+Once.litmus
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Test of write-read coherence, that is, whether or not a write
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to a given variable followed by a read from that same variable
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are ordered.
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CoWW+poonceonce.litmus
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Test of write-write coherence, that is, whether or not two
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successive writes to the same variable are ordered.
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IRIW+mbonceonces+OnceOnce.litmus
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Test of independent reads from independent writes with smp_mb()
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between each pairs of reads. In other words, is smp_mb()
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sufficient to cause two different reading processes to agree on
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the order of a pair of writes, where each write is to a different
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variable by a different process?
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IRIW+poonceonces+OnceOnce.litmus
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Test of independent reads from independent writes with nothing
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between each pairs of reads. In other words, is anything at all
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needed to cause two different reading processes to agree on the
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order of a pair of writes, where each write is to a different
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variable by a different process?
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ISA2+pooncelock+pooncelock+pombonce.litmus
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Tests whether the ordering provided by a lock-protected S
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litmus test is visible to an external process whose accesses are
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separated by smp_mb(). This addition of an external process to
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S is otherwise known as ISA2.
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ISA2+poonceonces.litmus
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As below, but with store-release replaced with WRITE_ONCE()
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and load-acquire replaced with READ_ONCE().
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ISA2+pooncerelease+poacquirerelease+poacquireonce.litmus
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Can a release-acquire chain order a prior store against
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a later load?
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LB+ctrlonceonce+mbonceonce.litmus
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Does a control dependency and an smp_mb() suffice for the
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load-buffering litmus test, where each process reads from one
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of two variables then writes to the other?
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LB+poacquireonce+pooncerelease.litmus
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Does a release-acquire pair suffice for the load-buffering
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litmus test, where each process reads from one of two variables then
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writes to the other?
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LB+poonceonces.litmus
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As above, but with store-release replaced with WRITE_ONCE()
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and load-acquire replaced with READ_ONCE().
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MP+onceassign+derefonce.litmus
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As below, but with rcu_assign_pointer() and an rcu_dereference().
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MP+polockmbonce+poacquiresilsil.litmus
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Protect the access with a lock and an smp_mb__after_spinlock()
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in one process, and use an acquire load followed by a pair of
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spin_is_locked() calls in the other process.
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MP+polockonce+poacquiresilsil.litmus
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Protect the access with a lock in one process, and use an
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acquire load followed by a pair of spin_is_locked() calls
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in the other process.
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MP+polocks.litmus
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As below, but with the second access of the writer process
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and the first access of reader process protected by a lock.
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MP+poonceonces.litmus
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As below, but without the smp_rmb() and smp_wmb().
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MP+pooncerelease+poacquireonce.litmus
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As below, but with a release-acquire chain.
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MP+porevlocks.litmus
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As below, but with the first access of the writer process
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and the second access of reader process protected by a lock.
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MP+wmbonceonce+rmbonceonce.litmus
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Does a smp_wmb() (between the stores) and an smp_rmb() (between
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the loads) suffice for the message-passing litmus test, where one
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process writes data and then a flag, and the other process reads
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the flag and then the data. (This is similar to the ISA2 tests,
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but with two processes instead of three.)
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R+mbonceonces.litmus
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This is the fully ordered (via smp_mb()) version of one of
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the classic counterintuitive litmus tests that illustrates the
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effects of store propagation delays.
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R+poonceonces.litmus
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As above, but without the smp_mb() invocations.
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SB+mbonceonces.litmus
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This is the fully ordered (again, via smp_mb() version of store
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buffering, which forms the core of Dekker's mutual-exclusion
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algorithm.
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SB+poonceonces.litmus
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As above, but without the smp_mb() invocations.
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S+poonceonces.litmus
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As below, but without the smp_wmb() and acquire load.
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S+wmbonceonce+poacquireonce.litmus
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Can a smp_wmb(), instead of a release, and an acquire order
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a prior store against a subsequent store?
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WRC+poonceonces+Once.litmus
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WRC+pooncerelease+rmbonceonce+Once.litmus
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These two are members of an extension of the MP litmus-test class
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in which the first write is moved to a separate process.
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Z6.0+pooncelock+pooncelock+pombonce.litmus
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Is the ordering provided by a spin_unlock() and a subsequent
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spin_lock() sufficient to make ordering apparent to accesses
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by a process not holding the lock?
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Z6.0+pooncelock+poonceLock+pombonce.litmus
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As above, but with smp_mb__after_spinlock() immediately
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following the spin_lock().
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Z6.0+pooncerelease+poacquirerelease+mbonceonce.litmus
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Is the ordering provided by a release-acquire chain sufficient
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to make ordering apparent to accesses by a process that does
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not participate in that release-acquire chain?
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A great many more litmus tests are available here:
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https://github.com/paulmckrcu/litmus
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