mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-16 16:54:20 +08:00
153e397920
Most PHY chips, when idle, can complete a register access in the time needed for two or three PCI read transactions; bigger delays occur only when data is currently being moved over the link/PHY interface. So if we busy-wait a few times when waiting for the register access to finish, it is likely that we can finish without having to sleep. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> |
||
---|---|---|
.. | ||
core-card.c | ||
core-cdev.c | ||
core-device.c | ||
core-iso.c | ||
core-topology.c | ||
core-transaction.c | ||
core.h | ||
Kconfig | ||
Makefile | ||
net.c | ||
ohci.c | ||
ohci.h | ||
sbp2.c |