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340d79a14d
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it was merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> # for at91 Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231006-dt-asoc-header-cleanups-v3-1-13a4f0f7fee6@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
888 lines
22 KiB
C
888 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Driver for ADAU1701 SigmaDSP processor
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*
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* Copyright 2011 Analog Devices Inc.
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* Author: Lars-Peter Clausen <lars@metafoo.de>
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* based on an inital version by Cliff Cai <cliff.cai@analog.com>
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/i2c.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/gpio/consumer.h>
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#include <linux/regulator/consumer.h>
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#include <linux/regmap.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <asm/unaligned.h>
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#include "sigmadsp.h"
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#include "adau1701.h"
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#define ADAU1701_SAFELOAD_DATA(i) (0x0810 + (i))
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#define ADAU1701_SAFELOAD_ADDR(i) (0x0815 + (i))
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#define ADAU1701_DSPCTRL 0x081c
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#define ADAU1701_SEROCTL 0x081e
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#define ADAU1701_SERICTL 0x081f
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#define ADAU1701_AUXNPOW 0x0822
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#define ADAU1701_PINCONF_0 0x0820
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#define ADAU1701_PINCONF_1 0x0821
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#define ADAU1701_AUXNPOW 0x0822
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#define ADAU1701_OSCIPOW 0x0826
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#define ADAU1701_DACSET 0x0827
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#define ADAU1701_MAX_REGISTER 0x0828
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#define ADAU1701_DSPCTRL_CR (1 << 2)
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#define ADAU1701_DSPCTRL_DAM (1 << 3)
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#define ADAU1701_DSPCTRL_ADM (1 << 4)
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#define ADAU1701_DSPCTRL_IST (1 << 5)
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#define ADAU1701_DSPCTRL_SR_48 0x00
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#define ADAU1701_DSPCTRL_SR_96 0x01
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#define ADAU1701_DSPCTRL_SR_192 0x02
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#define ADAU1701_DSPCTRL_SR_MASK 0x03
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#define ADAU1701_SEROCTL_INV_LRCLK 0x2000
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#define ADAU1701_SEROCTL_INV_BCLK 0x1000
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#define ADAU1701_SEROCTL_MASTER 0x0800
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#define ADAU1701_SEROCTL_OBF16 0x0000
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#define ADAU1701_SEROCTL_OBF8 0x0200
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#define ADAU1701_SEROCTL_OBF4 0x0400
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#define ADAU1701_SEROCTL_OBF2 0x0600
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#define ADAU1701_SEROCTL_OBF_MASK 0x0600
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#define ADAU1701_SEROCTL_OLF1024 0x0000
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#define ADAU1701_SEROCTL_OLF512 0x0080
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#define ADAU1701_SEROCTL_OLF256 0x0100
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#define ADAU1701_SEROCTL_OLF_MASK 0x0180
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#define ADAU1701_SEROCTL_MSB_DEALY1 0x0000
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#define ADAU1701_SEROCTL_MSB_DEALY0 0x0004
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#define ADAU1701_SEROCTL_MSB_DEALY8 0x0008
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#define ADAU1701_SEROCTL_MSB_DEALY12 0x000c
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#define ADAU1701_SEROCTL_MSB_DEALY16 0x0010
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#define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c
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#define ADAU1701_SEROCTL_WORD_LEN_24 0x0000
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#define ADAU1701_SEROCTL_WORD_LEN_20 0x0001
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#define ADAU1701_SEROCTL_WORD_LEN_16 0x0002
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#define ADAU1701_SEROCTL_WORD_LEN_MASK 0x0003
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#define ADAU1701_AUXNPOW_VBPD 0x40
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#define ADAU1701_AUXNPOW_VRPD 0x20
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#define ADAU1701_SERICTL_I2S 0
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#define ADAU1701_SERICTL_LEFTJ 1
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#define ADAU1701_SERICTL_TDM 2
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#define ADAU1701_SERICTL_RIGHTJ_24 3
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#define ADAU1701_SERICTL_RIGHTJ_20 4
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#define ADAU1701_SERICTL_RIGHTJ_18 5
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#define ADAU1701_SERICTL_RIGHTJ_16 6
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#define ADAU1701_SERICTL_MODE_MASK 7
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#define ADAU1701_SERICTL_INV_BCLK BIT(3)
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#define ADAU1701_SERICTL_INV_LRCLK BIT(4)
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#define ADAU1701_OSCIPOW_OPD 0x04
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#define ADAU1701_DACSET_DACINIT 1
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#define ADAU1707_CLKDIV_UNSET (-1U)
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#define ADAU1701_FIRMWARE "adau1701.bin"
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static const char * const supply_names[] = {
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"dvdd", "avdd"
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};
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struct adau1701 {
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struct gpio_desc *gpio_nreset;
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struct gpio_descs *gpio_pll_mode;
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unsigned int dai_fmt;
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unsigned int pll_clkdiv;
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unsigned int sysclk;
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struct regmap *regmap;
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struct i2c_client *client;
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u8 pin_config[12];
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struct sigmadsp *sigmadsp;
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struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
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};
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static const struct snd_kcontrol_new adau1701_controls[] = {
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SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
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};
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static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
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SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
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SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
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SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
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SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
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SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
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SND_SOC_DAPM_OUTPUT("OUT0"),
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SND_SOC_DAPM_OUTPUT("OUT1"),
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SND_SOC_DAPM_OUTPUT("OUT2"),
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SND_SOC_DAPM_OUTPUT("OUT3"),
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SND_SOC_DAPM_INPUT("IN0"),
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SND_SOC_DAPM_INPUT("IN1"),
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};
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static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
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{ "OUT0", NULL, "DAC0" },
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{ "OUT1", NULL, "DAC1" },
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{ "OUT2", NULL, "DAC2" },
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{ "OUT3", NULL, "DAC3" },
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{ "ADC", NULL, "IN0" },
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{ "ADC", NULL, "IN1" },
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};
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static unsigned int adau1701_register_size(struct device *dev,
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unsigned int reg)
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{
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switch (reg) {
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case ADAU1701_PINCONF_0:
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case ADAU1701_PINCONF_1:
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return 3;
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case ADAU1701_DSPCTRL:
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case ADAU1701_SEROCTL:
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case ADAU1701_AUXNPOW:
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case ADAU1701_OSCIPOW:
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case ADAU1701_DACSET:
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return 2;
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case ADAU1701_SERICTL:
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return 1;
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}
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dev_err(dev, "Unsupported register address: %d\n", reg);
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return 0;
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}
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static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case ADAU1701_DACSET:
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case ADAU1701_DSPCTRL:
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return true;
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default:
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return false;
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}
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}
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static int adau1701_reg_write(void *context, unsigned int reg,
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unsigned int value)
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{
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struct i2c_client *client = context;
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unsigned int i;
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unsigned int size;
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uint8_t buf[5];
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int ret;
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size = adau1701_register_size(&client->dev, reg);
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if (size == 0)
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return -EINVAL;
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buf[0] = reg >> 8;
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buf[1] = reg & 0xff;
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for (i = size + 1; i >= 2; --i) {
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buf[i] = value;
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value >>= 8;
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}
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ret = i2c_master_send(client, buf, size + 2);
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if (ret == size + 2)
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return 0;
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else if (ret < 0)
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return ret;
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else
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return -EIO;
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}
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static int adau1701_reg_read(void *context, unsigned int reg,
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unsigned int *value)
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{
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int ret;
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unsigned int i;
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unsigned int size;
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uint8_t send_buf[2], recv_buf[3];
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struct i2c_client *client = context;
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struct i2c_msg msgs[2];
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size = adau1701_register_size(&client->dev, reg);
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if (size == 0)
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return -EINVAL;
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send_buf[0] = reg >> 8;
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send_buf[1] = reg & 0xff;
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msgs[0].addr = client->addr;
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msgs[0].len = sizeof(send_buf);
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msgs[0].buf = send_buf;
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msgs[0].flags = 0;
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msgs[1].addr = client->addr;
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msgs[1].len = size;
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msgs[1].buf = recv_buf;
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msgs[1].flags = I2C_M_RD;
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ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
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if (ret < 0)
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return ret;
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else if (ret != ARRAY_SIZE(msgs))
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return -EIO;
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*value = 0;
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for (i = 0; i < size; i++) {
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*value <<= 8;
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*value |= recv_buf[i];
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}
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return 0;
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}
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static int adau1701_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
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const uint8_t bytes[], size_t len)
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{
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struct i2c_client *client = to_i2c_client(sigmadsp->dev);
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struct adau1701 *adau1701 = i2c_get_clientdata(client);
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unsigned int val;
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unsigned int i;
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uint8_t buf[10];
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int ret;
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ret = regmap_read(adau1701->regmap, ADAU1701_DSPCTRL, &val);
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if (ret)
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return ret;
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if (val & ADAU1701_DSPCTRL_IST)
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msleep(50);
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for (i = 0; i < len / 4; i++) {
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put_unaligned_le16(ADAU1701_SAFELOAD_DATA(i), buf);
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buf[2] = 0x00;
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memcpy(buf + 3, bytes + i * 4, 4);
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ret = i2c_master_send(client, buf, 7);
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if (ret < 0)
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return ret;
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else if (ret != 7)
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return -EIO;
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put_unaligned_le16(ADAU1701_SAFELOAD_ADDR(i), buf);
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put_unaligned_le16(addr + i, buf + 2);
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ret = i2c_master_send(client, buf, 4);
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if (ret < 0)
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return ret;
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else if (ret != 4)
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return -EIO;
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}
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return regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
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ADAU1701_DSPCTRL_IST, ADAU1701_DSPCTRL_IST);
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}
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static const struct sigmadsp_ops adau1701_sigmadsp_ops = {
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.safeload = adau1701_safeload,
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};
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static int adau1701_reset(struct snd_soc_component *component, unsigned int clkdiv,
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unsigned int rate)
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{
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struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
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int ret;
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DECLARE_BITMAP(values, 2);
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sigmadsp_reset(adau1701->sigmadsp);
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if (clkdiv != ADAU1707_CLKDIV_UNSET && adau1701->gpio_pll_mode) {
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switch (clkdiv) {
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case 64:
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__assign_bit(0, values, 0);
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__assign_bit(1, values, 0);
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break;
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case 256:
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__assign_bit(0, values, 0);
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__assign_bit(1, values, 1);
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break;
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case 384:
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__assign_bit(0, values, 1);
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__assign_bit(1, values, 0);
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break;
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case 0: /* fallback */
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case 512:
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__assign_bit(0, values, 1);
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__assign_bit(1, values, 1);
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break;
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}
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gpiod_set_array_value_cansleep(adau1701->gpio_pll_mode->ndescs,
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adau1701->gpio_pll_mode->desc, adau1701->gpio_pll_mode->info,
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values);
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}
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adau1701->pll_clkdiv = clkdiv;
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if (adau1701->gpio_nreset) {
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gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);
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/* minimum reset time is 20ns */
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udelay(1);
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gpiod_set_value_cansleep(adau1701->gpio_nreset, 1);
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/* power-up time may be as long as 85ms */
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mdelay(85);
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}
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/*
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* Postpone the firmware download to a point in time when we
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* know the correct PLL setup
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*/
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if (clkdiv != ADAU1707_CLKDIV_UNSET) {
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ret = sigmadsp_setup(adau1701->sigmadsp, rate);
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if (ret) {
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dev_warn(component->dev, "Failed to load firmware\n");
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return ret;
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}
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}
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regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
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regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
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regcache_mark_dirty(adau1701->regmap);
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regcache_sync(adau1701->regmap);
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return 0;
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}
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static int adau1701_set_capture_pcm_format(struct snd_soc_component *component,
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struct snd_pcm_hw_params *params)
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{
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struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
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unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
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unsigned int val;
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switch (params_width(params)) {
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case 16:
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val = ADAU1701_SEROCTL_WORD_LEN_16;
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break;
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case 20:
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val = ADAU1701_SEROCTL_WORD_LEN_20;
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break;
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case 24:
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val = ADAU1701_SEROCTL_WORD_LEN_24;
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break;
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default:
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return -EINVAL;
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}
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if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
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switch (params_width(params)) {
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case 16:
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val |= ADAU1701_SEROCTL_MSB_DEALY16;
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break;
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case 20:
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val |= ADAU1701_SEROCTL_MSB_DEALY12;
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break;
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case 24:
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val |= ADAU1701_SEROCTL_MSB_DEALY8;
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break;
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}
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mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
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}
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regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
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return 0;
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}
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static int adau1701_set_playback_pcm_format(struct snd_soc_component *component,
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struct snd_pcm_hw_params *params)
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{
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struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
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unsigned int val;
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if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
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return 0;
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switch (params_width(params)) {
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case 16:
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val = ADAU1701_SERICTL_RIGHTJ_16;
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break;
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case 20:
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val = ADAU1701_SERICTL_RIGHTJ_20;
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break;
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case 24:
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val = ADAU1701_SERICTL_RIGHTJ_24;
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break;
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default:
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return -EINVAL;
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}
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regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
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ADAU1701_SERICTL_MODE_MASK, val);
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return 0;
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}
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static int adau1701_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component = dai->component;
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struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
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unsigned int clkdiv = adau1701->sysclk / params_rate(params);
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unsigned int val;
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int ret;
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/*
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* If the mclk/lrclk ratio changes, the chip needs updated PLL
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* mode GPIO settings, and a full reset cycle, including a new
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* firmware upload.
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*/
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if (clkdiv != adau1701->pll_clkdiv) {
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ret = adau1701_reset(component, clkdiv, params_rate(params));
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if (ret < 0)
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return ret;
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}
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switch (params_rate(params)) {
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case 192000:
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val = ADAU1701_DSPCTRL_SR_192;
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break;
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case 96000:
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val = ADAU1701_DSPCTRL_SR_96;
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break;
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case 48000:
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val = ADAU1701_DSPCTRL_SR_48;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
|
|
ADAU1701_DSPCTRL_SR_MASK, val);
|
|
|
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
|
|
return adau1701_set_playback_pcm_format(component, params);
|
|
else
|
|
return adau1701_set_capture_pcm_format(component, params);
|
|
}
|
|
|
|
static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
|
unsigned int fmt)
|
|
{
|
|
struct snd_soc_component *component = codec_dai->component;
|
|
struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
|
|
unsigned int serictl = 0x00, seroctl = 0x00;
|
|
bool invert_lrclk;
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
|
|
case SND_SOC_DAIFMT_CBP_CFP:
|
|
/* master, 64-bits per sample, 1 frame per sample */
|
|
seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
|
|
| ADAU1701_SEROCTL_OLF1024;
|
|
break;
|
|
case SND_SOC_DAIFMT_CBC_CFC:
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* clock inversion */
|
|
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
|
|
case SND_SOC_DAIFMT_NB_NF:
|
|
invert_lrclk = false;
|
|
break;
|
|
case SND_SOC_DAIFMT_NB_IF:
|
|
invert_lrclk = true;
|
|
break;
|
|
case SND_SOC_DAIFMT_IB_NF:
|
|
invert_lrclk = false;
|
|
serictl |= ADAU1701_SERICTL_INV_BCLK;
|
|
seroctl |= ADAU1701_SEROCTL_INV_BCLK;
|
|
break;
|
|
case SND_SOC_DAIFMT_IB_IF:
|
|
invert_lrclk = true;
|
|
serictl |= ADAU1701_SERICTL_INV_BCLK;
|
|
seroctl |= ADAU1701_SEROCTL_INV_BCLK;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
|
case SND_SOC_DAIFMT_I2S:
|
|
break;
|
|
case SND_SOC_DAIFMT_LEFT_J:
|
|
serictl |= ADAU1701_SERICTL_LEFTJ;
|
|
seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
|
|
invert_lrclk = !invert_lrclk;
|
|
break;
|
|
case SND_SOC_DAIFMT_RIGHT_J:
|
|
serictl |= ADAU1701_SERICTL_RIGHTJ_24;
|
|
seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
|
|
invert_lrclk = !invert_lrclk;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (invert_lrclk) {
|
|
seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
|
|
serictl |= ADAU1701_SERICTL_INV_LRCLK;
|
|
}
|
|
|
|
adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
|
|
|
|
regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
|
|
regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
|
|
~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int adau1701_set_bias_level(struct snd_soc_component *component,
|
|
enum snd_soc_bias_level level)
|
|
{
|
|
unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
|
|
struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
|
|
|
|
switch (level) {
|
|
case SND_SOC_BIAS_ON:
|
|
break;
|
|
case SND_SOC_BIAS_PREPARE:
|
|
break;
|
|
case SND_SOC_BIAS_STANDBY:
|
|
/* Enable VREF and VREF buffer */
|
|
regmap_update_bits(adau1701->regmap,
|
|
ADAU1701_AUXNPOW, mask, 0x00);
|
|
break;
|
|
case SND_SOC_BIAS_OFF:
|
|
/* Disable VREF and VREF buffer */
|
|
regmap_update_bits(adau1701->regmap,
|
|
ADAU1701_AUXNPOW, mask, mask);
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int adau1701_mute_stream(struct snd_soc_dai *dai, int mute, int direction)
|
|
{
|
|
struct snd_soc_component *component = dai->component;
|
|
unsigned int mask = ADAU1701_DSPCTRL_DAM;
|
|
struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
|
|
unsigned int val;
|
|
|
|
if (mute)
|
|
val = 0;
|
|
else
|
|
val = mask;
|
|
|
|
regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int adau1701_set_sysclk(struct snd_soc_component *component, int clk_id,
|
|
int source, unsigned int freq, int dir)
|
|
{
|
|
unsigned int val;
|
|
struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
|
|
|
|
switch (clk_id) {
|
|
case ADAU1701_CLK_SRC_OSC:
|
|
val = 0x0;
|
|
break;
|
|
case ADAU1701_CLK_SRC_MCLK:
|
|
val = ADAU1701_OSCIPOW_OPD;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
|
|
ADAU1701_OSCIPOW_OPD, val);
|
|
adau1701->sysclk = freq;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int adau1701_startup(struct snd_pcm_substream *substream,
|
|
struct snd_soc_dai *dai)
|
|
{
|
|
struct adau1701 *adau1701 = snd_soc_component_get_drvdata(dai->component);
|
|
|
|
return sigmadsp_restrict_params(adau1701->sigmadsp, substream);
|
|
}
|
|
|
|
#define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
|
|
SNDRV_PCM_RATE_192000)
|
|
|
|
#define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
|
|
SNDRV_PCM_FMTBIT_S24_LE)
|
|
|
|
static const struct snd_soc_dai_ops adau1701_dai_ops = {
|
|
.set_fmt = adau1701_set_dai_fmt,
|
|
.hw_params = adau1701_hw_params,
|
|
.mute_stream = adau1701_mute_stream,
|
|
.startup = adau1701_startup,
|
|
.no_capture_mute = 1,
|
|
};
|
|
|
|
static struct snd_soc_dai_driver adau1701_dai = {
|
|
.name = "adau1701",
|
|
.playback = {
|
|
.stream_name = "Playback",
|
|
.channels_min = 2,
|
|
.channels_max = 8,
|
|
.rates = ADAU1701_RATES,
|
|
.formats = ADAU1701_FORMATS,
|
|
},
|
|
.capture = {
|
|
.stream_name = "Capture",
|
|
.channels_min = 2,
|
|
.channels_max = 8,
|
|
.rates = ADAU1701_RATES,
|
|
.formats = ADAU1701_FORMATS,
|
|
},
|
|
.ops = &adau1701_dai_ops,
|
|
.symmetric_rate = 1,
|
|
};
|
|
|
|
#ifdef CONFIG_OF
|
|
static const struct of_device_id adau1701_dt_ids[] = {
|
|
{ .compatible = "adi,adau1701", },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
|
|
#endif
|
|
|
|
static int adau1701_probe(struct snd_soc_component *component)
|
|
{
|
|
int i, ret;
|
|
unsigned int val;
|
|
struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
|
|
|
|
ret = sigmadsp_attach(adau1701->sigmadsp, component);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
|
|
adau1701->supplies);
|
|
if (ret < 0) {
|
|
dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Let the pll_clkdiv variable default to something that won't happen
|
|
* at runtime. That way, we can postpone the firmware download from
|
|
* adau1701_reset() to a point in time when we know the correct PLL
|
|
* mode parameters.
|
|
*/
|
|
adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
|
|
|
|
/* initalize with pre-configured pll mode settings */
|
|
ret = adau1701_reset(component, adau1701->pll_clkdiv, 0);
|
|
if (ret < 0)
|
|
goto exit_regulators_disable;
|
|
|
|
/* set up pin config */
|
|
val = 0;
|
|
for (i = 0; i < 6; i++)
|
|
val |= adau1701->pin_config[i] << (i * 4);
|
|
|
|
regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
|
|
|
|
val = 0;
|
|
for (i = 0; i < 6; i++)
|
|
val |= adau1701->pin_config[i + 6] << (i * 4);
|
|
|
|
regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
|
|
|
|
return 0;
|
|
|
|
exit_regulators_disable:
|
|
|
|
regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
|
|
return ret;
|
|
}
|
|
|
|
static void adau1701_remove(struct snd_soc_component *component)
|
|
{
|
|
struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
|
|
|
|
if (adau1701->gpio_nreset)
|
|
gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);
|
|
|
|
regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int adau1701_suspend(struct snd_soc_component *component)
|
|
{
|
|
struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
|
|
|
|
regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies),
|
|
adau1701->supplies);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int adau1701_resume(struct snd_soc_component *component)
|
|
{
|
|
struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
|
|
int ret;
|
|
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
|
|
adau1701->supplies);
|
|
if (ret < 0) {
|
|
dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
return adau1701_reset(component, adau1701->pll_clkdiv, 0);
|
|
}
|
|
#else
|
|
#define adau1701_resume NULL
|
|
#define adau1701_suspend NULL
|
|
#endif /* CONFIG_PM */
|
|
|
|
static const struct snd_soc_component_driver adau1701_component_drv = {
|
|
.probe = adau1701_probe,
|
|
.remove = adau1701_remove,
|
|
.resume = adau1701_resume,
|
|
.suspend = adau1701_suspend,
|
|
.set_bias_level = adau1701_set_bias_level,
|
|
.controls = adau1701_controls,
|
|
.num_controls = ARRAY_SIZE(adau1701_controls),
|
|
.dapm_widgets = adau1701_dapm_widgets,
|
|
.num_dapm_widgets = ARRAY_SIZE(adau1701_dapm_widgets),
|
|
.dapm_routes = adau1701_dapm_routes,
|
|
.num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes),
|
|
.set_sysclk = adau1701_set_sysclk,
|
|
.use_pmdown_time = 1,
|
|
.endianness = 1,
|
|
};
|
|
|
|
static const struct regmap_config adau1701_regmap = {
|
|
.reg_bits = 16,
|
|
.val_bits = 32,
|
|
.max_register = ADAU1701_MAX_REGISTER,
|
|
.cache_type = REGCACHE_MAPLE,
|
|
.volatile_reg = adau1701_volatile_reg,
|
|
.reg_write = adau1701_reg_write,
|
|
.reg_read = adau1701_reg_read,
|
|
};
|
|
|
|
static int adau1701_i2c_probe(struct i2c_client *client)
|
|
{
|
|
struct adau1701 *adau1701;
|
|
struct device *dev = &client->dev;
|
|
int ret, i;
|
|
|
|
adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
|
|
if (!adau1701)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(supply_names); i++)
|
|
adau1701->supplies[i].supply = supply_names[i];
|
|
|
|
ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(adau1701->supplies),
|
|
adau1701->supplies);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to get regulators: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
|
|
adau1701->supplies);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to enable regulators: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
adau1701->client = client;
|
|
adau1701->regmap = devm_regmap_init(dev, NULL, client,
|
|
&adau1701_regmap);
|
|
if (IS_ERR(adau1701->regmap)) {
|
|
ret = PTR_ERR(adau1701->regmap);
|
|
goto exit_regulators_disable;
|
|
}
|
|
|
|
|
|
if (dev->of_node) {
|
|
of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
|
|
&adau1701->pll_clkdiv);
|
|
|
|
of_property_read_u8_array(dev->of_node, "adi,pin-config",
|
|
adau1701->pin_config,
|
|
ARRAY_SIZE(adau1701->pin_config));
|
|
}
|
|
|
|
adau1701->gpio_nreset = devm_gpiod_get_optional(dev, "reset", GPIOD_IN);
|
|
|
|
if (IS_ERR(adau1701->gpio_nreset)) {
|
|
ret = PTR_ERR(adau1701->gpio_nreset);
|
|
goto exit_regulators_disable;
|
|
}
|
|
|
|
adau1701->gpio_pll_mode = devm_gpiod_get_array_optional(dev, "adi,pll-mode", GPIOD_OUT_LOW);
|
|
|
|
if (IS_ERR(adau1701->gpio_pll_mode)) {
|
|
ret = PTR_ERR(adau1701->gpio_pll_mode);
|
|
goto exit_regulators_disable;
|
|
}
|
|
|
|
i2c_set_clientdata(client, adau1701);
|
|
|
|
adau1701->sigmadsp = devm_sigmadsp_init_i2c(client,
|
|
&adau1701_sigmadsp_ops, ADAU1701_FIRMWARE);
|
|
if (IS_ERR(adau1701->sigmadsp)) {
|
|
ret = PTR_ERR(adau1701->sigmadsp);
|
|
goto exit_regulators_disable;
|
|
}
|
|
|
|
ret = devm_snd_soc_register_component(&client->dev,
|
|
&adau1701_component_drv,
|
|
&adau1701_dai, 1);
|
|
|
|
exit_regulators_disable:
|
|
|
|
regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
|
|
return ret;
|
|
}
|
|
|
|
static const struct i2c_device_id adau1701_i2c_id[] = {
|
|
{ "adau1401", 0 },
|
|
{ "adau1401a", 0 },
|
|
{ "adau1701", 0 },
|
|
{ "adau1702", 0 },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
|
|
|
|
static struct i2c_driver adau1701_i2c_driver = {
|
|
.driver = {
|
|
.name = "adau1701",
|
|
.of_match_table = of_match_ptr(adau1701_dt_ids),
|
|
},
|
|
.probe = adau1701_i2c_probe,
|
|
.id_table = adau1701_i2c_id,
|
|
};
|
|
|
|
module_i2c_driver(adau1701_i2c_driver);
|
|
|
|
MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
|
|
MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
|
|
MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
|
|
MODULE_LICENSE("GPL");
|