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7fb6a7d652
Currently gvt dmesg is so heavy at drm.debug=0x2 that guest and host almost couldn't run on xengt. This patch transfer these repeated messages into trace, so dmesg is light at drm.debug=0x2, and user could get the target message through trace event and trace filter. Suggested-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
296 lines
7.9 KiB
C
296 lines
7.9 KiB
C
/*
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* Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Eddie Dong <eddie.dong@intel.com>
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* Dexuan Cui
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* Jike Song <jike.song@intel.com>
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*
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* Contributors:
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* Zhi Wang <zhi.a.wang@intel.com>
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*
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*/
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#ifndef _GVT_MPT_H_
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#define _GVT_MPT_H_
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/**
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* DOC: Hypervisor Service APIs for GVT-g Core Logic
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*
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* This is the glue layer between specific hypervisor MPT modules and GVT-g core
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* logic. Each kind of hypervisor MPT module provides a collection of function
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* callbacks and will be attached to GVT host when the driver is loading.
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* GVT-g core logic will call these APIs to request specific services from
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* hypervisor.
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*/
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/**
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* intel_gvt_hypervisor_host_init - init GVT-g host side
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*
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* Returns:
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* Zero on success, negative error code if failed
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*/
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static inline int intel_gvt_hypervisor_host_init(struct device *dev,
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void *gvt, const void *ops)
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{
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/* optional to provide */
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if (!intel_gvt_host.mpt->host_init)
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return 0;
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return intel_gvt_host.mpt->host_init(dev, gvt, ops);
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}
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/**
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* intel_gvt_hypervisor_host_exit - exit GVT-g host side
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*/
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static inline void intel_gvt_hypervisor_host_exit(struct device *dev,
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void *gvt)
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{
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/* optional to provide */
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if (!intel_gvt_host.mpt->host_exit)
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return;
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intel_gvt_host.mpt->host_exit(dev, gvt);
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}
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/**
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* intel_gvt_hypervisor_attach_vgpu - call hypervisor to initialize vGPU
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* related stuffs inside hypervisor.
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*
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* Returns:
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* Zero on success, negative error code if failed.
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*/
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static inline int intel_gvt_hypervisor_attach_vgpu(struct intel_vgpu *vgpu)
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{
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/* optional to provide */
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if (!intel_gvt_host.mpt->attach_vgpu)
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return 0;
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return intel_gvt_host.mpt->attach_vgpu(vgpu, &vgpu->handle);
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}
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/**
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* intel_gvt_hypervisor_detach_vgpu - call hypervisor to release vGPU
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* related stuffs inside hypervisor.
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*
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* Returns:
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* Zero on success, negative error code if failed.
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*/
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static inline void intel_gvt_hypervisor_detach_vgpu(struct intel_vgpu *vgpu)
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{
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/* optional to provide */
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if (!intel_gvt_host.mpt->detach_vgpu)
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return;
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intel_gvt_host.mpt->detach_vgpu(vgpu->handle);
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}
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#define MSI_CAP_CONTROL(offset) (offset + 2)
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#define MSI_CAP_ADDRESS(offset) (offset + 4)
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#define MSI_CAP_DATA(offset) (offset + 8)
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#define MSI_CAP_EN 0x1
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/**
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* intel_gvt_hypervisor_inject_msi - inject a MSI interrupt into vGPU
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*
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* Returns:
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* Zero on success, negative error code if failed.
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*/
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static inline int intel_gvt_hypervisor_inject_msi(struct intel_vgpu *vgpu)
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{
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unsigned long offset = vgpu->gvt->device_info.msi_cap_offset;
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u16 control, data;
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u32 addr;
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int ret;
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control = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_CONTROL(offset));
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addr = *(u32 *)(vgpu_cfg_space(vgpu) + MSI_CAP_ADDRESS(offset));
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data = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_DATA(offset));
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/* Do not generate MSI if MSIEN is disable */
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if (!(control & MSI_CAP_EN))
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return 0;
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if (WARN(control & GENMASK(15, 1), "only support one MSI format\n"))
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return -EINVAL;
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trace_inject_msi(vgpu->id, addr, data);
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ret = intel_gvt_host.mpt->inject_msi(vgpu->handle, addr, data);
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if (ret)
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return ret;
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return 0;
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}
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/**
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* intel_gvt_hypervisor_set_wp_page - translate a host VA into MFN
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* @p: host kernel virtual address
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*
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* Returns:
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* MFN on success, INTEL_GVT_INVALID_ADDR if failed.
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*/
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static inline unsigned long intel_gvt_hypervisor_virt_to_mfn(void *p)
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{
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return intel_gvt_host.mpt->from_virt_to_mfn(p);
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}
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/**
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* intel_gvt_hypervisor_set_wp_page - set a guest page to write-protected
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* @vgpu: a vGPU
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* @p: intel_vgpu_guest_page
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*
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* Returns:
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* Zero on success, negative error code if failed.
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*/
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static inline int intel_gvt_hypervisor_set_wp_page(struct intel_vgpu *vgpu,
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struct intel_vgpu_guest_page *p)
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{
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int ret;
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if (p->writeprotection)
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return 0;
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ret = intel_gvt_host.mpt->set_wp_page(vgpu->handle, p->gfn);
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if (ret)
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return ret;
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p->writeprotection = true;
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atomic_inc(&vgpu->gtt.n_write_protected_guest_page);
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return 0;
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}
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/**
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* intel_gvt_hypervisor_unset_wp_page - remove the write-protection of a
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* guest page
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* @vgpu: a vGPU
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* @p: intel_vgpu_guest_page
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*
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* Returns:
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* Zero on success, negative error code if failed.
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*/
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static inline int intel_gvt_hypervisor_unset_wp_page(struct intel_vgpu *vgpu,
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struct intel_vgpu_guest_page *p)
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{
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int ret;
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if (!p->writeprotection)
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return 0;
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ret = intel_gvt_host.mpt->unset_wp_page(vgpu->handle, p->gfn);
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if (ret)
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return ret;
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p->writeprotection = false;
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atomic_dec(&vgpu->gtt.n_write_protected_guest_page);
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return 0;
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}
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/**
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* intel_gvt_hypervisor_read_gpa - copy data from GPA to host data buffer
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* @vgpu: a vGPU
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* @gpa: guest physical address
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* @buf: host data buffer
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* @len: data length
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*
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* Returns:
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* Zero on success, negative error code if failed.
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*/
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static inline int intel_gvt_hypervisor_read_gpa(struct intel_vgpu *vgpu,
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unsigned long gpa, void *buf, unsigned long len)
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{
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return intel_gvt_host.mpt->read_gpa(vgpu->handle, gpa, buf, len);
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}
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/**
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* intel_gvt_hypervisor_write_gpa - copy data from host data buffer to GPA
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* @vgpu: a vGPU
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* @gpa: guest physical address
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* @buf: host data buffer
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* @len: data length
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*
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* Returns:
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* Zero on success, negative error code if failed.
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*/
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static inline int intel_gvt_hypervisor_write_gpa(struct intel_vgpu *vgpu,
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unsigned long gpa, void *buf, unsigned long len)
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{
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return intel_gvt_host.mpt->write_gpa(vgpu->handle, gpa, buf, len);
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}
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/**
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* intel_gvt_hypervisor_gfn_to_mfn - translate a GFN to MFN
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* @vgpu: a vGPU
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* @gpfn: guest pfn
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*
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* Returns:
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* MFN on success, INTEL_GVT_INVALID_ADDR if failed.
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*/
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static inline unsigned long intel_gvt_hypervisor_gfn_to_mfn(
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struct intel_vgpu *vgpu, unsigned long gfn)
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{
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return intel_gvt_host.mpt->gfn_to_mfn(vgpu->handle, gfn);
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}
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/**
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* intel_gvt_hypervisor_map_gfn_to_mfn - map a GFN region to MFN
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* @vgpu: a vGPU
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* @gfn: guest PFN
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* @mfn: host PFN
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* @nr: amount of PFNs
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* @map: map or unmap
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*
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* Returns:
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* Zero on success, negative error code if failed.
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*/
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static inline int intel_gvt_hypervisor_map_gfn_to_mfn(
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struct intel_vgpu *vgpu, unsigned long gfn,
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unsigned long mfn, unsigned int nr,
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bool map)
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{
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/* a MPT implementation could have MMIO mapped elsewhere */
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if (!intel_gvt_host.mpt->map_gfn_to_mfn)
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return 0;
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return intel_gvt_host.mpt->map_gfn_to_mfn(vgpu->handle, gfn, mfn, nr,
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map);
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}
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/**
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* intel_gvt_hypervisor_set_trap_area - Trap a guest PA region
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* @vgpu: a vGPU
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* @start: the beginning of the guest physical address region
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* @end: the end of the guest physical address region
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* @map: map or unmap
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*
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* Returns:
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* Zero on success, negative error code if failed.
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*/
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static inline int intel_gvt_hypervisor_set_trap_area(
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struct intel_vgpu *vgpu, u64 start, u64 end, bool map)
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{
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/* a MPT implementation could have MMIO trapped elsewhere */
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if (!intel_gvt_host.mpt->set_trap_area)
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return 0;
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return intel_gvt_host.mpt->set_trap_area(vgpu->handle, start, end, map);
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}
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#endif /* _GVT_MPT_H_ */
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