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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
245 lines
5.6 KiB
C
245 lines
5.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#include <linux/clk/at91_pmc.h>
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#include <linux/of.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include "pmc.h"
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#define PROG_ID_MAX 7
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#define PROG_STATUS_MASK(id) (1 << ((id) + 8))
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#define PROG_PRES(layout, pckr) ((pckr >> layout->pres_shift) & layout->pres_mask)
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#define PROG_MAX_RM9200_CSS 3
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struct clk_programmable {
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struct clk_hw hw;
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struct regmap *regmap;
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u8 id;
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const struct clk_programmable_layout *layout;
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};
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#define to_clk_programmable(hw) container_of(hw, struct clk_programmable, hw)
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static unsigned long clk_programmable_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_programmable *prog = to_clk_programmable(hw);
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const struct clk_programmable_layout *layout = prog->layout;
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unsigned int pckr;
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unsigned long rate;
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regmap_read(prog->regmap, AT91_PMC_PCKR(prog->id), &pckr);
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if (layout->is_pres_direct)
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rate = parent_rate / (PROG_PRES(layout, pckr) + 1);
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else
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rate = parent_rate >> PROG_PRES(layout, pckr);
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return rate;
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}
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static int clk_programmable_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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{
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struct clk_programmable *prog = to_clk_programmable(hw);
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const struct clk_programmable_layout *layout = prog->layout;
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struct clk_hw *parent;
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long best_rate = -EINVAL;
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unsigned long parent_rate;
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unsigned long tmp_rate = 0;
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int shift;
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int i;
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for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
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parent = clk_hw_get_parent_by_index(hw, i);
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if (!parent)
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continue;
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parent_rate = clk_hw_get_rate(parent);
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if (layout->is_pres_direct) {
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for (shift = 0; shift <= layout->pres_mask; shift++) {
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tmp_rate = parent_rate / (shift + 1);
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if (tmp_rate <= req->rate)
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break;
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}
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} else {
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for (shift = 0; shift < layout->pres_mask; shift++) {
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tmp_rate = parent_rate >> shift;
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if (tmp_rate <= req->rate)
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break;
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}
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}
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if (tmp_rate > req->rate)
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continue;
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if (best_rate < 0 ||
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(req->rate - tmp_rate) < (req->rate - best_rate)) {
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best_rate = tmp_rate;
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req->best_parent_rate = parent_rate;
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req->best_parent_hw = parent;
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}
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if (!best_rate)
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break;
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}
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if (best_rate < 0)
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return best_rate;
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req->rate = best_rate;
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return 0;
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}
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static int clk_programmable_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_programmable *prog = to_clk_programmable(hw);
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const struct clk_programmable_layout *layout = prog->layout;
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unsigned int mask = layout->css_mask;
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unsigned int pckr = index;
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if (layout->have_slck_mck)
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mask |= AT91_PMC_CSSMCK_MCK;
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if (index > layout->css_mask) {
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if (index > PROG_MAX_RM9200_CSS && !layout->have_slck_mck)
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return -EINVAL;
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pckr |= AT91_PMC_CSSMCK_MCK;
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}
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regmap_update_bits(prog->regmap, AT91_PMC_PCKR(prog->id), mask, pckr);
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return 0;
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}
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static u8 clk_programmable_get_parent(struct clk_hw *hw)
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{
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struct clk_programmable *prog = to_clk_programmable(hw);
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const struct clk_programmable_layout *layout = prog->layout;
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unsigned int pckr;
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u8 ret;
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regmap_read(prog->regmap, AT91_PMC_PCKR(prog->id), &pckr);
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ret = pckr & layout->css_mask;
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if (layout->have_slck_mck && (pckr & AT91_PMC_CSSMCK_MCK) && !ret)
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ret = PROG_MAX_RM9200_CSS + 1;
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return ret;
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}
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static int clk_programmable_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_programmable *prog = to_clk_programmable(hw);
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const struct clk_programmable_layout *layout = prog->layout;
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unsigned long div = parent_rate / rate;
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int shift = 0;
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if (!div)
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return -EINVAL;
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if (layout->is_pres_direct) {
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shift = div - 1;
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if (shift > layout->pres_mask)
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return -EINVAL;
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} else {
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shift = fls(div) - 1;
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if (div != (1 << shift))
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return -EINVAL;
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if (shift >= layout->pres_mask)
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return -EINVAL;
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}
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regmap_update_bits(prog->regmap, AT91_PMC_PCKR(prog->id),
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layout->pres_mask << layout->pres_shift,
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shift << layout->pres_shift);
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return 0;
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}
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static const struct clk_ops programmable_ops = {
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.recalc_rate = clk_programmable_recalc_rate,
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.determine_rate = clk_programmable_determine_rate,
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.get_parent = clk_programmable_get_parent,
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.set_parent = clk_programmable_set_parent,
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.set_rate = clk_programmable_set_rate,
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};
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struct clk_hw * __init
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at91_clk_register_programmable(struct regmap *regmap,
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const char *name, const char **parent_names,
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u8 num_parents, u8 id,
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const struct clk_programmable_layout *layout)
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{
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struct clk_programmable *prog;
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struct clk_hw *hw;
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struct clk_init_data init;
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int ret;
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if (id > PROG_ID_MAX)
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return ERR_PTR(-EINVAL);
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prog = kzalloc(sizeof(*prog), GFP_KERNEL);
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if (!prog)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &programmable_ops;
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init.parent_names = parent_names;
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init.num_parents = num_parents;
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init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
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prog->id = id;
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prog->layout = layout;
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prog->hw.init = &init;
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prog->regmap = regmap;
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hw = &prog->hw;
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ret = clk_hw_register(NULL, &prog->hw);
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if (ret) {
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kfree(prog);
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hw = ERR_PTR(ret);
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} else {
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pmc_register_pck(id);
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}
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return hw;
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}
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const struct clk_programmable_layout at91rm9200_programmable_layout = {
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.pres_mask = 0x7,
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.pres_shift = 2,
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.css_mask = 0x3,
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.have_slck_mck = 0,
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.is_pres_direct = 0,
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};
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const struct clk_programmable_layout at91sam9g45_programmable_layout = {
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.pres_mask = 0x7,
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.pres_shift = 2,
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.css_mask = 0x3,
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.have_slck_mck = 1,
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.is_pres_direct = 0,
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};
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const struct clk_programmable_layout at91sam9x5_programmable_layout = {
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.pres_mask = 0x7,
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.pres_shift = 4,
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.css_mask = 0x7,
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.have_slck_mck = 0,
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.is_pres_direct = 0,
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};
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