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552d1ef6b5
Currently pcm_new() passes in 3 arguments :- card, pcm and DAI. Refactor this to only pass in 1 argument (i.e. the rtd) since struct rtd contains card, pcm and DAI along with other members too that are useful too. Signed-off-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
387 lines
10 KiB
C
387 lines
10 KiB
C
/*
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* SH7760 ("camelot") DMABRG audio DMA unit support
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*
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* Copyright (C) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
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* licensed under the terms outlined in the file COPYING at the root
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* of the linux kernel sources.
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*
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* The SH7760 DMABRG provides 4 dma channels (2x rec, 2x play), which
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* trigger an interrupt when one half of the programmed transfer size
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* has been xmitted.
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*
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* FIXME: little-endian only for now
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*/
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#include <linux/module.h>
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#include <linux/gfp.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <asm/dmabrg.h>
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/* registers and bits */
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#define BRGATXSAR 0x00
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#define BRGARXDAR 0x04
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#define BRGATXTCR 0x08
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#define BRGARXTCR 0x0C
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#define BRGACR 0x10
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#define BRGATXTCNT 0x14
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#define BRGARXTCNT 0x18
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#define ACR_RAR (1 << 18)
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#define ACR_RDS (1 << 17)
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#define ACR_RDE (1 << 16)
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#define ACR_TAR (1 << 2)
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#define ACR_TDS (1 << 1)
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#define ACR_TDE (1 << 0)
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/* receiver/transmitter data alignment */
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#define ACR_RAM_NONE (0 << 24)
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#define ACR_RAM_4BYTE (1 << 24)
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#define ACR_RAM_2WORD (2 << 24)
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#define ACR_TAM_NONE (0 << 8)
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#define ACR_TAM_4BYTE (1 << 8)
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#define ACR_TAM_2WORD (2 << 8)
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struct camelot_pcm {
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unsigned long mmio; /* DMABRG audio channel control reg MMIO */
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unsigned int txid; /* ID of first DMABRG IRQ for this unit */
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struct snd_pcm_substream *tx_ss;
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unsigned long tx_period_size;
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unsigned int tx_period;
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struct snd_pcm_substream *rx_ss;
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unsigned long rx_period_size;
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unsigned int rx_period;
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} cam_pcm_data[2] = {
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{
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.mmio = 0xFE3C0040,
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.txid = DMABRGIRQ_A0TXF,
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},
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{
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.mmio = 0xFE3C0060,
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.txid = DMABRGIRQ_A1TXF,
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},
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};
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#define BRGREG(x) (*(unsigned long *)(cam->mmio + (x)))
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/*
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* set a minimum of 16kb per period, to avoid interrupt-"storm" and
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* resulting skipping. In general, the bigger the minimum size, the
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* better for overall system performance. (The SH7760 is a puny CPU
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* with a slow SDRAM interface and poor internal bus bandwidth,
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* *especially* when the LCDC is active). The minimum for the DMAC
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* is 8 bytes; 16kbytes are enough to get skip-free playback of a
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* 44kHz/16bit/stereo MP3 on a lightly loaded system, and maintain
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* reasonable responsiveness in MPlayer.
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*/
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#define DMABRG_PERIOD_MIN 16 * 1024
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#define DMABRG_PERIOD_MAX 0x03fffffc
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#define DMABRG_PREALLOC_BUFFER 32 * 1024
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#define DMABRG_PREALLOC_BUFFER_MAX 32 * 1024
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/* support everything the SSI supports */
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#define DMABRG_RATES \
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SNDRV_PCM_RATE_8000_192000
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#define DMABRG_FMTS \
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(SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \
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SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \
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SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_U20_3LE | \
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SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_U24_3LE | \
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SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE)
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static struct snd_pcm_hardware camelot_pcm_hardware = {
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.info = (SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BLOCK_TRANSFER |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_BATCH),
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.formats = DMABRG_FMTS,
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.rates = DMABRG_RATES,
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.rate_min = 8000,
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.rate_max = 192000,
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.channels_min = 2,
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.channels_max = 8, /* max of the SSI */
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.buffer_bytes_max = DMABRG_PERIOD_MAX,
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.period_bytes_min = DMABRG_PERIOD_MIN,
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.period_bytes_max = DMABRG_PERIOD_MAX / 2,
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.periods_min = 2,
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.periods_max = 2,
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.fifo_size = 128,
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};
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static void camelot_txdma(void *data)
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{
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struct camelot_pcm *cam = data;
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cam->tx_period ^= 1;
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snd_pcm_period_elapsed(cam->tx_ss);
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}
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static void camelot_rxdma(void *data)
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{
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struct camelot_pcm *cam = data;
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cam->rx_period ^= 1;
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snd_pcm_period_elapsed(cam->rx_ss);
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}
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static int camelot_pcm_open(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
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int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
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int ret, dmairq;
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snd_soc_set_runtime_hwparams(substream, &camelot_pcm_hardware);
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/* DMABRG buffer half/full events */
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dmairq = (recv) ? cam->txid + 2 : cam->txid;
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if (recv) {
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cam->rx_ss = substream;
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ret = dmabrg_request_irq(dmairq, camelot_rxdma, cam);
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if (unlikely(ret)) {
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pr_debug("audio unit %d irqs already taken!\n",
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rtd->cpu_dai->id);
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return -EBUSY;
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}
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(void)dmabrg_request_irq(dmairq + 1,camelot_rxdma, cam);
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} else {
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cam->tx_ss = substream;
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ret = dmabrg_request_irq(dmairq, camelot_txdma, cam);
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if (unlikely(ret)) {
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pr_debug("audio unit %d irqs already taken!\n",
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rtd->cpu_dai->id);
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return -EBUSY;
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}
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(void)dmabrg_request_irq(dmairq + 1, camelot_txdma, cam);
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}
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return 0;
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}
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static int camelot_pcm_close(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
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int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
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int dmairq;
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dmairq = (recv) ? cam->txid + 2 : cam->txid;
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if (recv)
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cam->rx_ss = NULL;
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else
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cam->tx_ss = NULL;
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dmabrg_free_irq(dmairq + 1);
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dmabrg_free_irq(dmairq);
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return 0;
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}
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static int camelot_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *hw_params)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
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int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
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int ret;
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ret = snd_pcm_lib_malloc_pages(substream,
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params_buffer_bytes(hw_params));
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if (ret < 0)
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return ret;
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if (recv) {
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cam->rx_period_size = params_period_bytes(hw_params);
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cam->rx_period = 0;
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} else {
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cam->tx_period_size = params_period_bytes(hw_params);
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cam->tx_period = 0;
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}
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return 0;
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}
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static int camelot_hw_free(struct snd_pcm_substream *substream)
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{
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return snd_pcm_lib_free_pages(substream);
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}
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static int camelot_prepare(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
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pr_debug("PCM data: addr 0x%08ulx len %d\n",
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(u32)runtime->dma_addr, runtime->dma_bytes);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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BRGREG(BRGATXSAR) = (unsigned long)runtime->dma_area;
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BRGREG(BRGATXTCR) = runtime->dma_bytes;
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} else {
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BRGREG(BRGARXDAR) = (unsigned long)runtime->dma_area;
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BRGREG(BRGARXTCR) = runtime->dma_bytes;
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}
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return 0;
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}
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static inline void dmabrg_play_dma_start(struct camelot_pcm *cam)
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{
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unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
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/* start DMABRG engine: XFER start, auto-addr-reload */
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BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD;
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}
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static inline void dmabrg_play_dma_stop(struct camelot_pcm *cam)
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{
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unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
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/* forcibly terminate data transmission */
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BRGREG(BRGACR) = acr | ACR_TDS;
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}
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static inline void dmabrg_rec_dma_start(struct camelot_pcm *cam)
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{
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unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
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/* start DMABRG engine: recv start, auto-reload */
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BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD;
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}
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static inline void dmabrg_rec_dma_stop(struct camelot_pcm *cam)
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{
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unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
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/* forcibly terminate data receiver */
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BRGREG(BRGACR) = acr | ACR_RDS;
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}
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static int camelot_trigger(struct snd_pcm_substream *substream, int cmd)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
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int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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if (recv)
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dmabrg_rec_dma_start(cam);
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else
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dmabrg_play_dma_start(cam);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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if (recv)
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dmabrg_rec_dma_stop(cam);
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else
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dmabrg_play_dma_stop(cam);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static snd_pcm_uframes_t camelot_pos(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
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int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
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unsigned long pos;
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/* cannot use the DMABRG pointer register: under load, by the
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* time ALSA comes around to read the register, it is already
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* far ahead (or worse, already done with the fragment) of the
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* position at the time the IRQ was triggered, which results in
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* fast-playback sound in my test application (ScummVM)
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*/
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if (recv)
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pos = cam->rx_period ? cam->rx_period_size : 0;
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else
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pos = cam->tx_period ? cam->tx_period_size : 0;
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return bytes_to_frames(runtime, pos);
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}
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static struct snd_pcm_ops camelot_pcm_ops = {
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.open = camelot_pcm_open,
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.close = camelot_pcm_close,
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.ioctl = snd_pcm_lib_ioctl,
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.hw_params = camelot_hw_params,
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.hw_free = camelot_hw_free,
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.prepare = camelot_prepare,
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.trigger = camelot_trigger,
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.pointer = camelot_pos,
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};
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static void camelot_pcm_free(struct snd_pcm *pcm)
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{
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snd_pcm_lib_preallocate_free_for_all(pcm);
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}
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static int camelot_pcm_new(struct snd_soc_pcm_runtime *rtd)
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{
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struct snd_pcm *pcm = rtd->pcm;
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/* dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
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* in MMAP mode (i.e. aplay -M)
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*/
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snd_pcm_lib_preallocate_pages_for_all(pcm,
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SNDRV_DMA_TYPE_CONTINUOUS,
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snd_dma_continuous_data(GFP_KERNEL),
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DMABRG_PREALLOC_BUFFER, DMABRG_PREALLOC_BUFFER_MAX);
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return 0;
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}
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static struct snd_soc_platform sh7760_soc_platform = {
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.pcm_ops = &camelot_pcm_ops,
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.pcm_new = camelot_pcm_new,
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.pcm_free = camelot_pcm_free,
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};
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static int __devinit sh7760_soc_platform_probe(struct platform_device *pdev)
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{
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return snd_soc_register_platform(&pdev->dev, &sh7760_soc_platform);
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}
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static int __devexit sh7760_soc_platform_remove(struct platform_device *pdev)
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{
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snd_soc_unregister_platform(&pdev->dev);
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return 0;
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}
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static struct platform_driver sh7760_pcm_driver = {
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.driver = {
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.name = "sh7760-pcm-audio",
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.owner = THIS_MODULE,
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},
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.probe = sh7760_soc_platform_probe,
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.remove = __devexit_p(sh7760_soc_platform_remove),
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};
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static int __init snd_sh7760_pcm_init(void)
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{
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return platform_driver_register(&sh7760_pcm_driver);
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}
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module_init(snd_sh7760_pcm_init);
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static void __exit snd_sh7760_pcm_exit(void)
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{
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platform_driver_unregister(&sh7760_pcm_driver);
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}
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module_exit(snd_sh7760_pcm_exit);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("SH7760 Audio DMA (DMABRG) driver");
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MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>");
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