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12dde44998
Having clocks grouped in a subnode is common practice, so move the crystals and the ADC clock under a clocks node for the at91sam9x5 SoC and at91sam9x5 based boards. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
108 lines
1.8 KiB
Plaintext
108 lines
1.8 KiB
Plaintext
/*
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* at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module
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*
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* Copyright (C) 2012 Atmel,
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/ {
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memory {
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reg = <0x20000000 0x8000000>;
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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main_clock: clock@0 {
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compatible = "atmel,osc", "fixed-clock";
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clock-frequency = <12000000>;
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};
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};
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clocks {
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slow_xtal {
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clock-frequency = <32768>;
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};
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main_xtal {
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clock-frequency = <12000000>;
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};
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};
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ahb {
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apb {
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pinctrl@fffff400 {
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1wire_cm {
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pinctrl_1wire_cm: 1wire_cm-0 {
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atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */
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};
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};
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};
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};
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nand0: nand@40000000 {
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nand-bus-width = <8>;
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nand-ecc-mode = "hw";
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atmel,has-pmecc; /* Enable PMECC */
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atmel,pmecc-cap = <2>;
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atmel,pmecc-sector-size = <512>;
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nand-on-flash-bbt;
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status = "okay";
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at91bootstrap@0 {
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label = "at91bootstrap";
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reg = <0x0 0x40000>;
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};
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uboot@40000 {
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label = "u-boot";
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reg = <0x40000 0x80000>;
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};
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ubootenv@c0000 {
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label = "U-Boot Env";
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reg = <0xc0000 0x140000>;
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};
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kernel@200000 {
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label = "kernel";
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reg = <0x200000 0x600000>;
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};
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rootfs@800000 {
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label = "rootfs";
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reg = <0x800000 0x1f800000>;
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};
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};
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};
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leds {
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compatible = "gpio-leds";
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pb18 {
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label = "pb18";
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gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "heartbeat";
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};
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pd21 {
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label = "pd21";
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gpios = <&pioD 21 GPIO_ACTIVE_HIGH>;
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};
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};
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1wire_cm {
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compatible = "w1-gpio";
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gpios = <&pioB 18 GPIO_ACTIVE_HIGH>;
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linux,open-drain;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_1wire_cm>;
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status = "okay";
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};
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};
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