mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-28 05:24:47 +08:00
13283626c8
The license text has been mangled at some point then copy pasted across multiple files. Restore it to what it should be. Note that this is not intended as a license change. Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Afzal Mohammed <afzal.mohd.ma@gmail.com> Acked-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
302 lines
7.5 KiB
Plaintext
302 lines
7.5 KiB
Plaintext
/*
|
|
* Copyright 2013 CompuLab Ltd.
|
|
*
|
|
* Author: Valentin Raevsky <valentin@compulab.co.il>
|
|
*
|
|
* This file is dual-licensed: you can use it either under the terms
|
|
* of the GPL or the X11 license, at your option. Note that this dual
|
|
* licensing only applies to this file, and not this project as a
|
|
* whole.
|
|
*
|
|
* a) This file is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License
|
|
* version 2 as published by the Free Software Foundation.
|
|
*
|
|
* This file is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* Or, alternatively,
|
|
*
|
|
* b) Permission is hereby granted, free of charge, to any person
|
|
* obtaining a copy of this software and associated documentation
|
|
* files (the "Software"), to deal in the Software without
|
|
* restriction, including without limitation the rights to use,
|
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
|
* sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following
|
|
* conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be
|
|
* included in all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include "imx6q.dtsi"
|
|
|
|
/ {
|
|
model = "CompuLab CM-FX6";
|
|
compatible = "compulab,cm-fx6", "fsl,imx6q";
|
|
|
|
memory {
|
|
reg = <0x10000000 0x80000000>;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
heartbeat-led {
|
|
label = "Heartbeat";
|
|
gpios = <&gpio2 31 0>;
|
|
linux,default-trigger = "heartbeat";
|
|
};
|
|
};
|
|
|
|
reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "regulator-pcie-power-on-gpio";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpio = <&gpio2 24 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_usb_h1_vbus: usb_h1_vbus {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "usb_h1_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_usb_otg_vbus: usb_otg_vbus {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "usb_otg_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
sound-spdif {
|
|
compatible = "fsl,imx-audio-spdif";
|
|
model = "imx-spdif";
|
|
spdif-controller = <&spdif>;
|
|
spdif-out;
|
|
spdif-in;
|
|
};
|
|
};
|
|
|
|
&cpu0 {
|
|
/*
|
|
* Although the imx6q fuse indicates that 1.2GHz operation is possible,
|
|
* the module behaves unstable at this frequency. Hence, remove the
|
|
* 1.2GHz operation point here.
|
|
*/
|
|
operating-points = <
|
|
/* kHz uV */
|
|
996000 1250000
|
|
852000 1250000
|
|
792000 1175000
|
|
396000 975000
|
|
>;
|
|
fsl,soc-operating-points = <
|
|
/* ARM kHz SOC-PU uV */
|
|
996000 1250000
|
|
852000 1250000
|
|
792000 1175000
|
|
396000 1175000
|
|
>;
|
|
};
|
|
|
|
&ecspi1 {
|
|
cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ecspi1>;
|
|
status = "okay";
|
|
|
|
m25p80@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "st,m25p", "jedec,spi-nor";
|
|
spi-max-frequency = <20000000>;
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
&fec {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_enet>;
|
|
phy-mode = "rgmii";
|
|
status = "okay";
|
|
};
|
|
|
|
&gpmi {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c3>;
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
|
|
eeprom@50 {
|
|
compatible = "at24,24c02";
|
|
reg = <0x50>;
|
|
pagesize = <16>;
|
|
};
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl_ecspi1: ecspi1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
|
|
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
|
|
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
|
|
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
|
|
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_enet: enetgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
|
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
|
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpmi_nand: gpminandgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
|
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
|
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
|
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
|
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
|
MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
|
|
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
|
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
|
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
|
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
|
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
|
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
|
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
|
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
|
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
|
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
|
MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_pcie: pciegrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
|
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_spdif: spdifgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
|
|
MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart4: uart4grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbh1: usbh1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
|
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
|
|
>;
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pcie>;
|
|
reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
|
|
vdd-supply = <®_pcie_power_on_gpio>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sata {
|
|
status = "okay";
|
|
};
|
|
|
|
&snvs_poweroff {
|
|
status = "okay";
|
|
};
|
|
|
|
&spdif {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_spdif>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart4>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh1 {
|
|
vbus-supply = <®_usb_h1_vbus>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbh1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
vbus-supply = <®_usb_otg_vbus>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
|
dr_mode = "otg";
|
|
status = "okay";
|
|
};
|