Mayuresh Chitale 122979aa26 RISC-V: Probe Svinval extension form ISA string ... Just like other ISA extensions, we allow callers/users to detect the presence of Svinval extension from ISA string. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org>		2022-10-02 10:18:31 +05:30
..
boot	riscv: dts: microchip: use an mpfs specific l2 compatible	2022-08-31 16:57:51 +01:00
configs	riscv: enable Docker requirements in defconfig	2022-07-22 13:43:28 -07:00
errata	RISC-V: Clean up the Zicbom block size probing	2022-09-13 02:06:11 -07:00
include	RISC-V: Probe Svinval extension form ISA string	2022-10-02 10:18:31 +05:30
kernel	RISC-V: Probe Svinval extension form ISA string	2022-10-02 10:18:31 +05:30
kvm	riscv: KVM: Apply insn-def to hlv encodings	2022-10-02 10:18:20 +05:30
lib	riscv: lib: uaccess: fix CSR_STATUS SR_SUM bit	2022-08-10 14:06:31 -07:00
mm	RISC-V Fixes for 6.0-rc7	2022-09-23 08:51:05 -07:00
net	bpf, riscv: Support riscv jit to provide bpf_line_info	2022-06-02 16:26:01 -07:00
purgatory	riscv/purgatory: Omit use of bin2c	2022-08-11 09:32:34 -07:00
Kbuild	riscv: move errata/ and kvm/ builds to arch/riscv/Kbuild	2022-06-01 22:26:32 -07:00
Kconfig	riscv: Introduce support for defining instructions	2022-10-02 10:18:07 +05:30
Kconfig.debug	RISC-V: Remove EARLY_PRINTK support	2018-12-17 10:23:46 -08:00
Kconfig.erratas	riscv: make t-head erratas depend on MMU	2022-09-17 01:48:22 -07:00
Kconfig.socs	riscv: Kconfig: Style cleanups	2022-06-30 19:26:16 -07:00
Makefile	arch/riscv: add Zihintpause support	2022-08-11 08:03:49 -07:00