mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-27 06:04:23 +08:00
c04c77540a
The v7_invalidate_l1 was used for the L1 cache that come out from reset in a undefined state. This is no need for Cortex-A15. We do it for A9 only. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
13 lines
281 B
ArmAsm
13 lines
281 B
ArmAsm
#include <linux/linkage.h>
|
|
#include <linux/init.h>
|
|
|
|
#include "sleep.h"
|
|
|
|
.section ".text.head", "ax"
|
|
|
|
ENTRY(tegra_secondary_startup)
|
|
check_cpu_part_num 0xc09, r8, r9
|
|
bleq v7_invalidate_l1
|
|
b secondary_startup
|
|
ENDPROC(tegra_secondary_startup)
|