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3b714d24ef
Add the cpufeature and hwcap entries to detect the presence of MTE. Any secondary CPU not supporting the feature, if detected on the boot CPU, will be parked. Add the minimum SCTLR_EL1 and HCR_EL2 bits for enabling MTE. The Normal Tagged memory type is configured in MAIR_EL1 before the MMU is enabled in order to avoid disrupting other CPUs in the CnP domain. Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Co-developed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com>
80 lines
2.4 KiB
C
80 lines
2.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _UAPI__ASM_HWCAP_H
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#define _UAPI__ASM_HWCAP_H
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/*
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* HWCAP flags - for AT_HWCAP
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*/
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#define HWCAP_FP (1 << 0)
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#define HWCAP_ASIMD (1 << 1)
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#define HWCAP_EVTSTRM (1 << 2)
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#define HWCAP_AES (1 << 3)
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#define HWCAP_PMULL (1 << 4)
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#define HWCAP_SHA1 (1 << 5)
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#define HWCAP_SHA2 (1 << 6)
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#define HWCAP_CRC32 (1 << 7)
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#define HWCAP_ATOMICS (1 << 8)
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#define HWCAP_FPHP (1 << 9)
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#define HWCAP_ASIMDHP (1 << 10)
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#define HWCAP_CPUID (1 << 11)
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#define HWCAP_ASIMDRDM (1 << 12)
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#define HWCAP_JSCVT (1 << 13)
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#define HWCAP_FCMA (1 << 14)
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#define HWCAP_LRCPC (1 << 15)
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#define HWCAP_DCPOP (1 << 16)
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#define HWCAP_SHA3 (1 << 17)
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#define HWCAP_SM3 (1 << 18)
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#define HWCAP_SM4 (1 << 19)
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#define HWCAP_ASIMDDP (1 << 20)
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#define HWCAP_SHA512 (1 << 21)
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#define HWCAP_SVE (1 << 22)
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#define HWCAP_ASIMDFHM (1 << 23)
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#define HWCAP_DIT (1 << 24)
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#define HWCAP_USCAT (1 << 25)
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#define HWCAP_ILRCPC (1 << 26)
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#define HWCAP_FLAGM (1 << 27)
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#define HWCAP_SSBS (1 << 28)
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#define HWCAP_SB (1 << 29)
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#define HWCAP_PACA (1 << 30)
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#define HWCAP_PACG (1UL << 31)
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/*
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* HWCAP2 flags - for AT_HWCAP2
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*/
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#define HWCAP2_DCPODP (1 << 0)
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#define HWCAP2_SVE2 (1 << 1)
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#define HWCAP2_SVEAES (1 << 2)
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#define HWCAP2_SVEPMULL (1 << 3)
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#define HWCAP2_SVEBITPERM (1 << 4)
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#define HWCAP2_SVESHA3 (1 << 5)
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#define HWCAP2_SVESM4 (1 << 6)
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#define HWCAP2_FLAGM2 (1 << 7)
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#define HWCAP2_FRINT (1 << 8)
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#define HWCAP2_SVEI8MM (1 << 9)
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#define HWCAP2_SVEF32MM (1 << 10)
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#define HWCAP2_SVEF64MM (1 << 11)
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#define HWCAP2_SVEBF16 (1 << 12)
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#define HWCAP2_I8MM (1 << 13)
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#define HWCAP2_BF16 (1 << 14)
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#define HWCAP2_DGH (1 << 15)
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#define HWCAP2_RNG (1 << 16)
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#define HWCAP2_BTI (1 << 17)
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#define HWCAP2_MTE (1 << 18)
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#endif /* _UAPI__ASM_HWCAP_H */
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