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10c8251cce
Add support for the TEMP_ALARM GEN2 PMIC peripheral subtype. The GEN2 subtype defines an over temperature state with hysteresis instead of stage in the status register. There are two GEN2 states corresponding to stages 1 and 2. Signed-off-by: David Collins <collinsd@codeaurora.org> Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
344 lines
8.2 KiB
C
344 lines
8.2 KiB
C
/*
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* Copyright (c) 2011-2015, 2017, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/iio/consumer.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/thermal.h>
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#define QPNP_TM_REG_TYPE 0x04
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#define QPNP_TM_REG_SUBTYPE 0x05
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#define QPNP_TM_REG_STATUS 0x08
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#define QPNP_TM_REG_SHUTDOWN_CTRL1 0x40
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#define QPNP_TM_REG_ALARM_CTRL 0x46
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#define QPNP_TM_TYPE 0x09
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#define QPNP_TM_SUBTYPE_GEN1 0x08
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#define QPNP_TM_SUBTYPE_GEN2 0x09
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#define STATUS_GEN1_STAGE_MASK GENMASK(1, 0)
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#define STATUS_GEN2_STATE_MASK GENMASK(6, 4)
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#define STATUS_GEN2_STATE_SHIFT 4
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#define SHUTDOWN_CTRL1_OVERRIDE_MASK GENMASK(7, 6)
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#define SHUTDOWN_CTRL1_THRESHOLD_MASK GENMASK(1, 0)
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#define ALARM_CTRL_FORCE_ENABLE BIT(7)
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/*
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* Trip point values based on threshold control
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* 0 = {105 C, 125 C, 145 C}
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* 1 = {110 C, 130 C, 150 C}
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* 2 = {115 C, 135 C, 155 C}
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* 3 = {120 C, 140 C, 160 C}
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*/
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#define TEMP_STAGE_STEP 20000 /* Stage step: 20.000 C */
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#define TEMP_STAGE_HYSTERESIS 2000
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#define TEMP_THRESH_MIN 105000 /* Threshold Min: 105 C */
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#define TEMP_THRESH_STEP 5000 /* Threshold step: 5 C */
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#define THRESH_MIN 0
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/* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
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#define DEFAULT_TEMP 37000
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struct qpnp_tm_chip {
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struct regmap *map;
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struct thermal_zone_device *tz_dev;
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unsigned int subtype;
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long temp;
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unsigned int thresh;
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unsigned int stage;
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unsigned int prev_stage;
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unsigned int base;
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struct iio_channel *adc;
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};
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/* This array maps from GEN2 alarm state to GEN1 alarm stage */
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static const unsigned int alarm_state_map[8] = {0, 1, 1, 2, 2, 3, 3, 3};
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static int qpnp_tm_read(struct qpnp_tm_chip *chip, u16 addr, u8 *data)
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{
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unsigned int val;
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int ret;
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ret = regmap_read(chip->map, chip->base + addr, &val);
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if (ret < 0)
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return ret;
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*data = val;
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return 0;
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}
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static int qpnp_tm_write(struct qpnp_tm_chip *chip, u16 addr, u8 data)
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{
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return regmap_write(chip->map, chip->base + addr, data);
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}
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/**
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* qpnp_tm_get_temp_stage() - return over-temperature stage
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* @chip: Pointer to the qpnp_tm chip
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*
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* Return: stage (GEN1) or state (GEN2) on success, or errno on failure.
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*/
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static int qpnp_tm_get_temp_stage(struct qpnp_tm_chip *chip)
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{
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int ret;
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u8 reg = 0;
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ret = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, ®);
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if (ret < 0)
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return ret;
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if (chip->subtype == QPNP_TM_SUBTYPE_GEN1)
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ret = reg & STATUS_GEN1_STAGE_MASK;
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else
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ret = (reg & STATUS_GEN2_STATE_MASK) >> STATUS_GEN2_STATE_SHIFT;
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return ret;
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}
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/*
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* This function updates the internal temp value based on the
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* current thermal stage and threshold as well as the previous stage
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*/
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static int qpnp_tm_update_temp_no_adc(struct qpnp_tm_chip *chip)
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{
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unsigned int stage, stage_new, stage_old;
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int ret;
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ret = qpnp_tm_get_temp_stage(chip);
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if (ret < 0)
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return ret;
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stage = ret;
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if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) {
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stage_new = stage;
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stage_old = chip->stage;
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} else {
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stage_new = alarm_state_map[stage];
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stage_old = alarm_state_map[chip->stage];
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}
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if (stage_new > stage_old) {
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/* increasing stage, use lower bound */
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chip->temp = (stage_new - 1) * TEMP_STAGE_STEP +
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chip->thresh * TEMP_THRESH_STEP +
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TEMP_STAGE_HYSTERESIS + TEMP_THRESH_MIN;
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} else if (stage_new < stage_old) {
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/* decreasing stage, use upper bound */
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chip->temp = stage_new * TEMP_STAGE_STEP +
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chip->thresh * TEMP_THRESH_STEP -
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TEMP_STAGE_HYSTERESIS + TEMP_THRESH_MIN;
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}
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chip->stage = stage;
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return 0;
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}
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static int qpnp_tm_get_temp(void *data, int *temp)
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{
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struct qpnp_tm_chip *chip = data;
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int ret, mili_celsius;
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if (!temp)
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return -EINVAL;
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if (!chip->adc) {
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ret = qpnp_tm_update_temp_no_adc(chip);
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if (ret < 0)
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return ret;
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} else {
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ret = iio_read_channel_processed(chip->adc, &mili_celsius);
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if (ret < 0)
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return ret;
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chip->temp = mili_celsius;
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}
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*temp = chip->temp < 0 ? 0 : chip->temp;
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return 0;
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}
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static const struct thermal_zone_of_device_ops qpnp_tm_sensor_ops = {
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.get_temp = qpnp_tm_get_temp,
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};
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static irqreturn_t qpnp_tm_isr(int irq, void *data)
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{
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struct qpnp_tm_chip *chip = data;
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thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED);
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return IRQ_HANDLED;
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}
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/*
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* This function initializes the internal temp value based on only the
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* current thermal stage and threshold. Setup threshold control and
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* disable shutdown override.
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*/
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static int qpnp_tm_init(struct qpnp_tm_chip *chip)
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{
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unsigned int stage;
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int ret;
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u8 reg = 0;
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ret = qpnp_tm_read(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, ®);
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if (ret < 0)
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return ret;
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chip->thresh = reg & SHUTDOWN_CTRL1_THRESHOLD_MASK;
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chip->temp = DEFAULT_TEMP;
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ret = qpnp_tm_get_temp_stage(chip);
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if (ret < 0)
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return ret;
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chip->stage = ret;
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stage = chip->subtype == QPNP_TM_SUBTYPE_GEN1
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? chip->stage : alarm_state_map[chip->stage];
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if (stage)
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chip->temp = chip->thresh * TEMP_THRESH_STEP +
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(stage - 1) * TEMP_STAGE_STEP +
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TEMP_THRESH_MIN;
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/*
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* Set threshold and disable software override of stage 2 and 3
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* shutdowns.
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*/
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chip->thresh = THRESH_MIN;
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reg &= ~(SHUTDOWN_CTRL1_OVERRIDE_MASK | SHUTDOWN_CTRL1_THRESHOLD_MASK);
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reg |= chip->thresh & SHUTDOWN_CTRL1_THRESHOLD_MASK;
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ret = qpnp_tm_write(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, reg);
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if (ret < 0)
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return ret;
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/* Enable the thermal alarm PMIC module in always-on mode. */
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reg = ALARM_CTRL_FORCE_ENABLE;
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ret = qpnp_tm_write(chip, QPNP_TM_REG_ALARM_CTRL, reg);
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return ret;
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}
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static int qpnp_tm_probe(struct platform_device *pdev)
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{
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struct qpnp_tm_chip *chip;
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struct device_node *node;
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u8 type, subtype;
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u32 res;
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int ret, irq;
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node = pdev->dev.of_node;
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chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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dev_set_drvdata(&pdev->dev, chip);
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chip->map = dev_get_regmap(pdev->dev.parent, NULL);
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if (!chip->map)
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return -ENXIO;
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ret = of_property_read_u32(node, "reg", &res);
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if (ret < 0)
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return ret;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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/* ADC based measurements are optional */
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chip->adc = devm_iio_channel_get(&pdev->dev, "thermal");
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if (IS_ERR(chip->adc)) {
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ret = PTR_ERR(chip->adc);
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chip->adc = NULL;
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if (ret == -EPROBE_DEFER)
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return ret;
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}
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chip->base = res;
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ret = qpnp_tm_read(chip, QPNP_TM_REG_TYPE, &type);
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if (ret < 0) {
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dev_err(&pdev->dev, "could not read type\n");
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return ret;
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}
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ret = qpnp_tm_read(chip, QPNP_TM_REG_SUBTYPE, &subtype);
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if (ret < 0) {
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dev_err(&pdev->dev, "could not read subtype\n");
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return ret;
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}
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if (type != QPNP_TM_TYPE || (subtype != QPNP_TM_SUBTYPE_GEN1
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&& subtype != QPNP_TM_SUBTYPE_GEN2)) {
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dev_err(&pdev->dev, "invalid type 0x%02x or subtype 0x%02x\n",
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type, subtype);
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return -ENODEV;
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}
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chip->subtype = subtype;
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ret = qpnp_tm_init(chip);
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if (ret < 0) {
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dev_err(&pdev->dev, "init failed\n");
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return ret;
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}
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ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, qpnp_tm_isr,
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IRQF_ONESHOT, node->name, chip);
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if (ret < 0)
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return ret;
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chip->tz_dev = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, chip,
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&qpnp_tm_sensor_ops);
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if (IS_ERR(chip->tz_dev)) {
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dev_err(&pdev->dev, "failed to register sensor\n");
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return PTR_ERR(chip->tz_dev);
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}
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return 0;
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}
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static const struct of_device_id qpnp_tm_match_table[] = {
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{ .compatible = "qcom,spmi-temp-alarm" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, qpnp_tm_match_table);
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static struct platform_driver qpnp_tm_driver = {
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.driver = {
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.name = "spmi-temp-alarm",
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.of_match_table = qpnp_tm_match_table,
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},
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.probe = qpnp_tm_probe,
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};
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module_platform_driver(qpnp_tm_driver);
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MODULE_ALIAS("platform:spmi-temp-alarm");
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MODULE_DESCRIPTION("QPNP PMIC Temperature Alarm driver");
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MODULE_LICENSE("GPL v2");
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